linux-kernel - Re: [PATCH 1/4] Documentation: devicetree: Fix s2mps11 and s5m8767 typos

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Message-ID: <CAD=FV=Wvu9WzTACovCjmOsce7KUStfAH7PX8rgROA0007HrahA@mail.gmail.com>
Date:	Mon, 23 Jun 2014 16:20:39 -0700
From:	Doug Anderson <dianders@...omium.org>
To:	Andreas Färber <afaerber@...e.de>
Cc:	Sachin Kamat <sachin.kamat@...sung.com>,
	linux-samsung-soc <linux-samsung-soc@...r.kernel.org>,
	Stephan van Schaik <stephan@...khronix.com>,
	Vincent Palatin <vpalatin@...omium.org>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Randy Dunlap <rdunlap@...radead.org>,
	Lee Jones <lee.jones@...aro.org>,
	Mark Brown <broonie@...aro.org>,
	Krzysztof Kozlowski <k.kozlowski@...sung.com>,
	Yadwinder Singh Brar <yadi.brar@...sung.com>,
	Tomasz Figa <t.figa@...sung.com>,
	Sachin Kamat <sachin.kamat@...aro.org>,
	"OPEN FIRMWARE AND..." <devicetree@...r.kernel.org>,
	DOCUMENTATION <linux-doc@...r.kernel.org>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/4] Documentation: devicetree: Fix s2mps11 and s5m8767 typos

Andreas,

On Mon, Jun 23, 2014 at 4:06 PM, Andreas Färber <afaerber@...e.de> wrote:
> I was wondering which character to type, and found two undocumented
> s5m8767_pmic properties downstream (s5m-core,enable-low-jitter and
> s5m-core,device_type = <0x2>), which I then left out.

I don't know much about "s5m-core,device_type", but I doubt it's
needed.  You can see <http://crosreview.com/42202> for details.  I
haven't looked but I'd bet that we just get this from the compatible
string now.

I did do a (very!) quick look and I see that low-jitter was originally
implemented in the local 3.4 kernel at <http://crosreview.com/43624>.
...and the local 3.8 kernel at <http://crosreview.com/66037>.

NOTE: it's pretty important to make sure low-jitter is turned on for
Chromebooks if you actually want full functionality.  At least on
exynos5250-snow (with the max77686 PMIC) you'd get occasional (and
very strange and very hard to debug) TPM errors if you didn't have
low-jitter.  The TPM is part of the security model on Chromebooks and
you might have a hard time accessing the encrypted parts of the disk
without it.

-Doug
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