linux-kernel - Re: [PATCH][v4] crypto: caam - Correct definition of registers in memory map

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Message-ID: <20140625134744.GA10379@gondor.apana.org.au>
Date:	Wed, 25 Jun 2014 21:47:44 +0800
From:	Herbert Xu <herbert@...dor.apana.org.au>
To:	Ruchika Gupta <ruchika.gupta@...escale.com>
Cc:	linux-crypto@...r.kernel.org, linux-kernel@...r.kernel.org,
	davem@...emloft.net, alexandru.porosanu@...escale.com,
	horia.geanta@...escale.com, grant.likely@...aro.org,
	NiteshNarayanLal@...escale.com, thierry.reding@...il.com,
	rob.herring@...xeda.com, kim.phillips@...escale.com,
	dan.carpenter@...cle.com
Subject: Re: [PATCH][v4] crypto: caam - Correct definition of registers in
 memory map

On Mon, Jun 23, 2014 at 03:08:28PM +0530, Ruchika Gupta wrote:
> Some registers like SECVID, CHAVID, CHA Revision Number,
> CTPR were defined as 64 bit resgisters.  The IP provides
> a DWT bit(Double word Transpose) to transpose the two words when
> a double word register is accessed. However setting this bit
> would also affect the operation of job descriptors as well as
> other registers which are truly double word in nature.
> So, for the IP to work correctly on big-endian as well as
> little-endian SoC's, change is required to access all 32 bit
> registers as 32 bit quantities.
> 
> Signed-off-by: Ruchika Gupta <ruchika.gupta@...escale.com>

Patch applied.
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Email: Herbert Xu <herbert@...dor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
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