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Date:	Fri, 27 Jun 2014 10:38:57 +0100
From:	Sudeep Holla <sudeep.holla@....com>
To:	Stephen Boyd <sboyd@...eaurora.org>
CC:	Sudeep Holla <sudeep.holla@....com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Heiko Carstens <heiko.carstens@...ibm.com>,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@....com>,
	Russell King <linux@....linux.org.uk>,
	Will Deacon <Will.Deacon@....com>,
	Nicolas Pitre <nicolas.pitre@...aro.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 8/9] ARM: kernel: add support for cpu cache information

Hi,

On 26/06/14 19:45, Stephen Boyd wrote:
> On 06/26/14 04:36, Sudeep Holla wrote:
>> Hi Stephen,
>>
>> On 26/06/14 01:19, Stephen Boyd wrote:
>>> On 06/25/14 10:30, Sudeep Holla wrote:
>>>> +
>>>> +/*
>>>> + * Which cache CCSIDR represents depends on CSSELR value
>>>> + * Make sure no one else changes CSSELR during this
>>>> + * smp_call_function_single prevents preemption for us
>>>> + */
>>>
>>> Where's the smp_call_function_single() or preemption disable happening?
>>>
>>
>> init_cache_level is called using smp_call_function_single in
>> drivers/base/cacheinfo.c(PATCH 2/9)
>
> Oh that's unexpected. Do other architectures require the use of
> smp_call_function_single() to read their cache information? It seems
> like an ARM architecture specific detail that has been pushed up into
> the generic layer.
>

Right, since I started with x86 as reference and it requires it, I missed to
see others. So x86,ARM{32,64} requires it while ppc,s390 and ia64 doesn't.
I see how to fix that. Thanks for spotting it.

Regards,
Sudeep

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