lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Mon, 30 Jun 2014 15:29:10 -0400
From:	Jason Cooper <jason@...edaemon.net>
To:	Sricharan R <r.sricharan@...com>
Cc:	linux-omap@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	nm@...com, linux@....linux.org.uk, tony@...mide.com, rnayak@...com,
	santosh.shilimkar@...com, joe@...ches.com, tglx@...utronix.de
Subject: Re: [PATCH V4 00/16] irqchip: crossbar: Driver fixes

On Thu, Jun 26, 2014 at 12:40:18PM +0530, Sricharan R wrote:
> This series does some cleanups, fixes for handling two interrupts
> getting mapped twice to same crossbar and provides support for
> hardwired IRQ and crossbar definitions.
> 
> On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10,
> 131, 132, 133 are direct wired to hardware blocks bypassing
> crossbar. This quirky implementation is *NOT* supposed to be the
> expectation of crossbar hardware usage. This series adds support
> to represent such hard-wired irqs through DT and avoid generic
> allocation/programming of crossbar in the driver.
> 
> This way of supporting hard-wired irqs was a result of
> the below discussions.
> http://www.spinics.net/lists/arm-kernel/msg329946.html
> 
> Based on 3.16 rc2 mainline.
> 
> All the patches are available here
>  git@...hub.com:Sricharanti/sricharan.git crossbar_updates
> 
> The fixes series[1] earlier posted is merged in to this.
> [1] http://www.spinics.net/lists/arm-kernel/msg328273.html
> 
> [V2] Merged the above series and rebased on 3.15 mainline
> 
> [V3] Modified patch#3 to get irqs-skip properties from DT,
>      merged path#8 for checkpatch warning to other relevant
>      patches and fixed comments for other patches.
> 
> [V4] Based on 3.16rc2 and fixed Jason's <jason@...edaemon.net> comments.
> 
> Nishanth Menon (14):
>   irqchip: crossbar: Dont use '0' to mark reserved interrupts
>   irqchip: crossbar: Check for premapped crossbar before allocating
>   irqchip: crossbar: Introduce ti,irqs-skip to skip irqs that bypass
>     crossbar
>   irqchip: crossbar: Initialise the crossbar with a safe value
>   irqchip: crossbar: Change allocation logic by reversing search for
>     free irqs
>   irqchip: crossbar: Remove IS_ERR_VALUE check
>   irqchip: crossbar: Fix sparse and checkpatch warnings
>   irqchip: crossbar: Fix kerneldoc warning
>   irqchip: crossbar: Return proper error value
>   irqchip: crossbar: Change the goto naming
>   irqchip: crossbar: Introduce ti,max-crossbar-sources to identify
>     valid crossbar mapping
>   irqchip: crossbar: Introduce centralized check for crossbar write
>   documentation: dt: omap: crossbar: Add description for interrupt
>     consumer
>   irqchip: crossbar: Allow for quirky hardware with direct hardwiring
>     of GIC
> 
> Sricharan R (2):
>   irqchip: crossbar: Set cb pointer to null in case of error
>   irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callback
> 
>  .../devicetree/bindings/arm/omap/crossbar.txt      |   36 +++++
>  drivers/irqchip/irq-crossbar.c                     |  168 +++++++++++++++++---
>  2 files changed, 179 insertions(+), 25 deletions(-)

Whole series applied to irqchip/crossbar, I'll give it a day or two in
-next, then I'll merge it into irqchip/core.

Tony: Right now, it's immutable unless you tell me I applied something
incorrectly.  Once it goes into irqchip/core, it's immutable no matter
what you say. ;-)

thx,

Jason.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists