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Message-Id: <1404203860-30712-2-git-send-email-xjq@rock-chips.com>
Date:	Tue,  1 Jul 2014 16:37:39 +0800
From:	jianqun <xjq@...k-chips.com>
To:	heiko@...ech.de, lgirdwood@...il.com, broonie@...nel.org,
	perex@...ex.cz, tiwai@...e.de, grant.likely@...aro.org,
	robh+dt@...nel.org
Cc:	linux-kernel@...r.kernel.org, alsa-devel@...a-project.org,
	devicetree@...r.kernel.org, zhangqing@...k-chips.com,
	hj@...k-chips.com, kever.yang@...k-chips.com,
	huangtao@...k-chips.com, zyw@...k-chips.com, yzq@...k-chips.com,
	zhenfu.fang@...k-chips.com, cf@...k-chips.com, kfx@...k-chips.com,
	Jianqun Xu <xjq@...k-chips.com>
Subject: [PATCH 1/2] ASoC: dt-bindings: add rockchip i2s bindings

From: Jianqun Xu <xjq@...k-chips.com>

Add devicetree bindings for i2s controller found on rk3066, rk3188 and rk3288
processors from rockchip.

Signed-off-by: Jianqun Xu <xjq@...k-chips.com>
---
 .../devicetree/bindings/sound/rockchip-i2s.txt     |   45 ++++++++++++++++++++
 1 file changed, 45 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/sound/rockchip-i2s.txt

diff --git a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
new file mode 100644
index 0000000..e9ab122
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
@@ -0,0 +1,45 @@
+* Rockchip I2S controller
+
+The I2S bus (Inter-IC sound bus) is a serial link for digital audio data transfer
+between devices in the system and be invented by Philips Semiconductor.
+
+Required properties:
+
+- compatible : should be one of the following.
+   "rockchip,rk3066-i2s": for rk3066
+   "rockchip,rk3188-i2s", "rockchip,rk3066-i2s" for rk3188
+   "rockchip,rk3288-i2s", "rockchip,rk3066-i2s" for rk3288
+- reg : physical base address of the controller and length of memory mapped
+  region.
+- interrupts : The interrupt number to the cpu. The interrupt specifier format
+  depends on the interrupt controller.
+- #address-cells : should be 1.
+- #size-cells : should be 0.
+- dmas : list of DMA controller phandle and DMA request line ordered pairs.
+- dma-names : identifier string for each DMA request line in the dmas property.
+  These strings correspond 1:1 with the ordered pairs in dmas.
+  Must include the following entries:
+  - rx:
+  - tx:
+- clocks : Handle to internal work clock and master clock output to IO.
+- clock-names :
+  - "i2s_hclk": support AHB bus interface
+  - "i2s_clk": work clock for i2s controller
+
+Example:
+
+aliases {
+	i2s0 = &i2s0;
+}
+
+i2s0: i2s@...90000 {
+	compatible = "rockchip,rk3066-i2s";
+	reg = <0xff890000 0x10000>;
+	interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	dmas = <&pdma1 0>, <&pdma1 1>;
+	dma-names = "rx", "tx";
+	clock-names = "i2s_hclk", "i2s_clk";
+	clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
+};
-- 
1.7.9.5


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