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Message-ID: <53B3CEAC.9080609@windriver.com>
Date: Wed, 2 Jul 2014 17:19:40 +0800
From: "Yang,Wei" <Wei.Yang@...driver.com>
To: <Wei.Yang@...driver.com>, <mroberto@...i.cetuc.puc-rio.br>,
<rmk+kernel@....linux.org.uk>
CC: <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v1] ARM:sa1100: Remove a redundant spin lock
Hi Guys,
What about this patch?
Thanks
Wei
On 07/01/2014 03:41 PM, Wei.Yang@...driver.com wrote:
> From: Yang Wei <Wei.Yang@...driver.com>
>
> The pair read/write of accessing pci confiuration space function
> has already protected by pci_lock. so remove nano_lock.
>
> Signed-off-by: Yang Wei <Wei.Yang@...driver.com>
> ---
> arch/arm/mach-sa1100/pci-nanoengine.c | 9 ---------
> 1 file changed, 9 deletions(-)
>
> diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c
> index ff02e2d..b944c99 100644
> --- a/arch/arm/mach-sa1100/pci-nanoengine.c
> +++ b/arch/arm/mach-sa1100/pci-nanoengine.c
> @@ -30,7 +30,6 @@
> #include <mach/nanoengine.h>
> #include <mach/hardware.h>
>
> -static DEFINE_SPINLOCK(nano_lock);
>
> static int nanoengine_get_pci_address(struct pci_bus *bus,
> unsigned int devfn, int where, unsigned long *address)
> @@ -52,7 +51,6 @@ static int nanoengine_read_config(struct pci_bus *bus, unsigned int devfn, int w
> {
> int ret;
> unsigned long address;
> - unsigned long flags;
> u32 v;
>
> /* nanoEngine PCI bridge does not return -1 for a non-existing
> @@ -64,15 +62,12 @@ static int nanoengine_read_config(struct pci_bus *bus, unsigned int devfn, int w
> goto exit_function;
> }
>
> - spin_lock_irqsave(&nano_lock, flags);
>
> ret = nanoengine_get_pci_address(bus, devfn, where, &address);
> if (ret != PCIBIOS_SUCCESSFUL)
> return ret;
> v = __raw_readl(address);
>
> - spin_unlock_irqrestore(&nano_lock, flags);
> -
> v >>= ((where & 3) * 8);
> v &= (unsigned long)(-1) >> ((4 - size) * 8);
>
> @@ -86,13 +81,11 @@ static int nanoengine_write_config(struct pci_bus *bus, unsigned int devfn, int
> {
> int ret;
> unsigned long address;
> - unsigned long flags;
> unsigned shift;
> u32 v;
>
> shift = (where & 3) * 8;
>
> - spin_lock_irqsave(&nano_lock, flags);
>
> ret = nanoengine_get_pci_address(bus, devfn, where, &address);
> if (ret != PCIBIOS_SUCCESSFUL)
> @@ -113,8 +106,6 @@ static int nanoengine_write_config(struct pci_bus *bus, unsigned int devfn, int
> }
> __raw_writel(v, address);
>
> - spin_unlock_irqrestore(&nano_lock, flags);
> -
> return PCIBIOS_SUCCESSFUL;
> }
>
--
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