lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <CAL8zT=i5A8hUdovht9HQGmv=xnHePcDkfw1fm-a62-FHedHd4A@mail.gmail.com>
Date:	Thu, 3 Jul 2014 17:05:46 +0200
From:	Jean-Michel Hautbois <jhautbois@...il.com>
To:	Stefan Roese <sr@...x.de>
Cc:	linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: Lattice ECP3 FPGA with i.MX6

> No. This driver was implemented and tested in a MPC5200 system. Most likely
> I missed some endian issues as you already noticed. I suggest you start with
> looking at this line:
>
>         jedec_id = *(u32 *)&rxbuf[4];
>
> And add some endian functions here, e.g. be32_to_cpu(). This might help with
> the detection. But other endian related issues might still be present in
> other parts of the driver as well.

Replacing this line with the following works better :
jedec_id = be32_to_cpu(*(u32 *)&rxbuf[4]);

At least, on detecting the FPGA...
I will send a patch, but there is only three places where there is a
be32_to_cpu() to add.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ