linux-kernel - Re: [PATCH] PCI: Add bridge DMA alias quirk for Intel 82801

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Message-ID: <20140705212629.GF28871@google.com>
Date:	Sat, 5 Jul 2014 15:26:29 -0600
From:	Bjorn Helgaas <bhelgaas@...gle.com>
To:	Alex Williamson <alex.williamson@...hat.com>
Cc:	linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
	Joerg Roedel <jroedel@...e.de>
Subject: Re: [PATCH] PCI: Add bridge DMA alias quirk for Intel 82801

[+cc Joerg]

On Sat, Jul 05, 2014 at 10:31:43AM -0600, Bjorn Helgaas wrote:
> On Mon, Jun 23, 2014 at 04:36:25PM -0600, Alex Williamson wrote:
> > This bridge sometimes shows up as a root complex device and sometimes
> > as a discrete PCIe-to-PCI bridge.  Testing indicates that in the
> > latter case, we need to enable the PCIe bridge DMA alias quirk.
> > 
> > Signed-off-by: Alex Williamson <alex.williamson@...hat.com>
> > Reported-by: Milos Kaurin <milos.kaurin@...il.com>
> > Tested-by: Milos Kaurin <milos.kaurin@...il.com>
> 
> Applied to for-linus for v3.16, thanks!

Actually, this quirk doesn't make any difference until the iommu changes
are in, so there's no reason to have this in v3.16, is there?  

I saw that Joerg applied those iommu changes to his core branch, which I
assume will be merged for v3.17.  So I'll move this to a pci/iommu branch,
to be merged during the v3.17 merge window.

> > ---
> > 
> >  drivers/pci/quirks.c |    2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> > index 78a7df6..460c354 100644
> > --- a/drivers/pci/quirks.c
> > +++ b/drivers/pci/quirks.c
> > @@ -3405,6 +3405,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ASMEDIA, 0x1080,
> >  DECLARE_PCI_FIXUP_HEADER(0x10e3, 0x8113, quirk_use_pcie_bridge_dma_alias);
> >  /* ITE 8892, https://bugzilla.kernel.org/show_bug.cgi?id=73551 */
> >  DECLARE_PCI_FIXUP_HEADER(0x1283, 0x8892, quirk_use_pcie_bridge_dma_alias);
> > +/* Intel 82801, https://bugzilla.kernel.org/show_bug.cgi?id=44881#c49 */
> > +DECLARE_PCI_FIXUP_HEADER(0x8086, 0x244e, quirk_use_pcie_bridge_dma_alias);
> >  
> >  /*
> >   * AMD has indicated that the devices below do not support peer-to-peer
> > 
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