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Message-Id: <1404817861-23359-1-git-send-email-mauricex.r.petallo@intel.com>
Date:	Tue,  8 Jul 2014 19:10:59 +0800
From:	Maurice Petallo <mauricex.r.petallo@...el.com>
To:	Chris Ball <chris@...ntf.net>
Cc:	linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org,
	Adrian Hunter <adrian.hunter@...el.com>,
	Maurice Petallo <mauricex.r.petallo@...el.com>
Subject: [PATCH 0/2] mmc: sdhci: Preset Value disabling and DDR50 mode enabling for BayTrail eMMC

This patch series includes:
(1) Declare SDHCI_QUIRK2_PRESET_VALUE_BROKEN for PCI mode and ACPI mode
    Baytrail eMMC controller as it doesn't support Preset Value feature.
(2) Enable DDR50 1.8V mode support for PCI and ACPI mode BayTrail eMMC controller

Maurice Petallo (2):
  mmc: sdhci: Preset value not supported in Baytrail eMMC
  mmc: sdhci: add DDR50 1.8V mode support for BayTrail eMMC Controller

 drivers/mmc/host/sdhci-acpi.c | 4 +++-
 drivers/mmc/host/sdhci-pci.c  | 3 ++-
 2 files changed, 5 insertions(+), 2 deletions(-)

-- 
1.8.1.4

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