[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <53BD4918.2040807@ti.com>
Date: Wed, 9 Jul 2014 09:52:24 -0400
From: Santosh Shilimkar <santosh.shilimkar@...com>
To: Murali Karicheri <m-karicheri2@...com>,
<devicetree@...r.kernel.org>
CC: <linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Russell King <linux@....linux.org.uk>,
Grant Likely <grant.likely@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Mohit Kumar <mohit.kumar@...com>,
Jingoo Han <jg1.han@...sung.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Pratyush Anand <pratyush.anand@...com>,
Richard Zhu <r65037@...escale.com>,
Kishon Vijay Abraham I <kishon@...com>,
Marek Vasut <marex@...x.de>, Arnd Bergmann <arnd@...db.de>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Randy Dunlap <rdunlap@...radead.org>
Subject: Re: [PATCH v3 0/5] Add Keystone PCIe controller driver
On Monday 30 June 2014 05:45 PM, Murali Karicheri wrote:
> This patch add PCIe controller driver for Keystone SoCs. This
> is based on v2 of the series posted to the mailing list.
> Keystone PCI controller is based on version 3.65 of the DW
> hardware. This driver re-uses some of the DW core driver
> functions and required modification in some to support
> the old DW h/w based Keystone driver.
>
> Please review and let me know if you have any comments.
>
> CC: Santosh Shilimkar <santosh.shilimkar@...com>
> CC: Russell King <linux@....linux.org.uk>
> CC: Grant Likely <grant.likely@...aro.org>
> CC: Rob Herring <robh+dt@...nel.org>
> CC: Mohit Kumar <mohit.kumar@...com>
> CC: Jingoo Han <jg1.han@...sung.com>
> CC: Bjorn Helgaas <bhelgaas@...gle.com>
> CC: Pratyush Anand <pratyush.anand@...com>
> CC: Richard Zhu <r65037@...escale.com>
> CC: Kishon Vijay Abraham I <kishon@...com>
> CC: Marek Vasut <marex@...x.de>
> CC: Arnd Bergmann <arnd@...db.de>
> CC: Pawel Moll <pawel.moll@....com>
> CC: Mark Rutland <mark.rutland@....com>
> CC: Ian Campbell <ijc+devicetree@...lion.org.uk>
> CC: Kumar Gala <galak@...eaurora.org>
> CC: Randy Dunlap <rdunlap@...radead.org>
> CC: Grant Likely <grant.likely@...aro.org>
>
> Changelog:
>
> v3
> - DW application register handling code is now part of
> Keystone PCI driver. RFC had this code part of Keystone
> PCI driver, then V1 moved this to a separate file to
> re-use on other platforms that uses this version of the
> DW h/w. Then based on comments against v2, this is moved
> back to Keystone driver.
> - Keystone SerDes phy driver is removed from this series so that
> this can be merged independent of that patch
> - added msi_set_irq()/clear_irq() API's to support Keystone
>
> V2
> - Split the designware pcie enhancement patch to multiple
> patches based on functionality added
> - Remove the quirk code and add a patch to fix mps/mrss
> tuning for ARM. Use kernel command line parameter
> pci=pcie_bus_perf to work with Keystone PCI Controller.
> Following patch addressed this.
> [PATCH v1] ARM: pci: add call to pcie_bus_configure_settings()
> - Add documentation for device tree bindings
> - Add separate interrupt controller nodes for MSI and Legacy
> IRQs and use irq map for legacy IRQ
> - Use compatibility to identify v3.65 version of the DW hardware
> and use it to customize the designware common code.
> - Use reg property for configuration space instead of range
> - Other minor updates based on code inspection.
>
> V1
> - Add an interrupt controller node for Legacy irq chip and use
> interrupt map/map-mask property to map legacy IRQs A/B/C/D
> - Add a Phy driver to replace the original serdes driver
> - Move common application register handling code to a separate
> file to allow re-use across other platforms that use older
> DW PCIe h/w
> - PCI quirk for maximum read request size. Check and override only
> if the maximum is higher than what controller can handle.
> - Converted to a module platform driver.
>
> Murali Karicheri (5):
> PCI: designware: add rd[wr]_other_conf API
> PCI: designware: refactor MSI code to work with v3.65 dw hardware
> PCI: designware: refactor host init code to re-use on keystone PCI
> PCI: designware: enhance dw core driver to support Keystone PCI host
> controller
> PCI: add PCI controller for Keystone PCIe h/w
>
I haven't given review remarks on public list but had few internal
review discussions with you. So just in case you need some
additional review/ack tags, feel free to include mine.
Acked-by: Santosh Shilimkar <santosh.shilimkar@...com>
Once the driver changes gets merged by Bjorn, I can they
merge the DTS related changes via my tree.
Thanks for all the work Murali !!
Regards,
Santosh
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists