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Message-ID: <20140709172229.GH7537@ld-irv-0074>
Date: Wed, 9 Jul 2014 10:22:29 -0700
From: Brian Norris <computersforpeace@...il.com>
To: Boris BREZILLON <boris.brezillon@...e-electrons.com>
Cc: Lee Jones <lee.jones@...aro.org>, devicetree@...r.kernel.org,
Boris BREZILLON <b.brezillon.dev@...il.com>,
kernel@...inux.com, linux-kernel@...r.kernel.org,
linux-mtd@...ts.infradead.org, "Gupta, Pekon\"" <pekon@...com>,
Ezequiel Garcia <ezequiel.garcia@...e-electrons.com>,
linux-arm-kernel@...ts.infradead.org,
Jason Gunthorpe <jgunthorpe@...idianresearch.com>
Subject: Re: [PATCH] mtd: nand: stm_nand_bch: add new driver
Hi Boris,
On Tue, Jul 08, 2014 at 09:58:55AM +0200, Boris BREZILLON wrote:
> On Mon, 7 Jul 2014 16:52:22 -0700 Brian Norris <computersforpeace@...il.com> wrote:
> > On Thu, Jul 03, 2014 at 10:05:22AM +0200, Boris BREZILLON wrote:
> > > On Wed, 2 Jul 2014 17:22:37 -0700 Brian Norris <computersforpeace@...il.com> wrote:
> > >
> > > AFAIR, the NAND timing representation for non-ONFI chips question was
> > > left unanswered:
> > >
> > > https://lkml.org/lkml/2014/5/20/581
> > >
> > > I can definitely respin my NAND timings series, but I'd like to be sure
> > > this is how you want it done before doing so.
> >
> > Can we start by supporting ONFI-only (or ONFI-only, plus entries in
> > nand_flash_ids[]), and have nand_base provide the translation so drivers
> > can retrieve the info? Then we can begin supporting new drivers like
> > Lee's, and worry about the DT question separately.
>
> So, basically, I just send a new series with patch 1 and 2 from my sunxi
> NAND series [1] (including the fixes you suggested, of course), right ?
>
> [1] http://thread.gmane.org/gmane.comp.hardware.netbook.arm.sunxi/7977
Yes, please send 1 and 2 on their own. I think that would be a good
start for supporting these drivers.
Brian
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