linux-kernel - Re: [RFC PATCH 1/2] spi: Add support for Zynq QSPI controller

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Message-ID: <CAFcVECJ93Lw1MRVU-=zLRbB6To--zmAxz8OLObu=mhV84-FTNA@mail.gmail.com>
Date:	Thu, 10 Jul 2014 15:01:25 +0530
From:	Harini Katakam <harinikatakamlinux@...il.com>
To:	Geert Uytterhoeven <geert@...ux-m68k.org>
Cc:	Mark Brown <broonie@...nel.org>,
	Grant Likely <grant.likely@...aro.org>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	linux-spi <linux-spi@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
	David Woodhouse <dwmw2@...radead.org>,
	Brian Norris <computersforpeace@...il.com>,
	Marek Vašut <marex@...x.de>,
	Artem Bityutskiy <artem.bityutskiy@...ux.intel.com>,
	Geert Uytterhoeven <geert+renesas@...ux-m68k.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Jingoo Han <jg1.han@...sung.com>,
	Sourav Poddar <sourav.poddar@...com>,
	"michals@...inx.com" <michals@...inx.com>,
	Punnaiah Choudary Kalluri <punnaia@...inx.com>
Subject: Re: [RFC PATCH 1/2] spi: Add support for Zynq QSPI controller

Hi Geert,

On Thu, Jul 10, 2014 at 2:48 PM, Geert Uytterhoeven
<geert@...ux-m68k.org> wrote:
> Hi Harini,
>
> On Thu, Jul 10, 2014 at 10:50 AM, Harini Katakam <harinik@...inx.com> wrote:
>> +       master->flags = SPI_MASTER_QUAD_MODE;
>
> SPI_MASTER_QUAD_MODE is not one of the SPI_MASTER_* defines
> in include/linux/spi/spi.h?
>

I'm sorry about that. That flag is unused - will remove this statement.

>> +       master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD |
>> +                           SPI_TX_DUAL | SPI_TX_QUAD;
>
> Your driver advertises Dual/Quad SPI Transfer capabilities, but it doesn't
> check spi_transfer.[tr]x_nbits? How can it determine when to enable Dual/Quad?
>

Here the driver is just giving information that the controller support it.
The MTD layer enables dual/quad based on what the flash supports; quad
being the first priority
I understand that the spi core reads rx, tx-bus-width property and
master support flags and
performs the necessary checks.

Regards,
Harini
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