linux-kernel - Re: [RFC PATCH 1/2] spi: Add support for Zynq QSPI controller

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Message-ID: <CAFcVECLMNH9GM-ScWunoMrn9AEEZD-ZYP9yYmFsCWqOYVTGNcg@mail.gmail.com>
Date:	Thu, 10 Jul 2014 17:25:19 +0530
From:	Harini Katakam <harinikatakamlinux@...il.com>
To:	Geert Uytterhoeven <geert@...ux-m68k.org>
Cc:	Mark Brown <broonie@...nel.org>,
	Grant Likely <grant.likely@...aro.org>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	linux-spi <linux-spi@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
	David Woodhouse <dwmw2@...radead.org>,
	Brian Norris <computersforpeace@...il.com>,
	Marek Vašut <marex@...x.de>,
	Artem Bityutskiy <artem.bityutskiy@...ux.intel.com>,
	Geert Uytterhoeven <geert+renesas@...ux-m68k.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Jingoo Han <jg1.han@...sung.com>,
	Sourav Poddar <sourav.poddar@...com>,
	"michals@...inx.com" <michals@...inx.com>,
	Punnaiah Choudary Kalluri <punnaia@...inx.com>
Subject: Re: [RFC PATCH 1/2] spi: Add support for Zynq QSPI controller

Hi Geert,

On Thu, Jul 10, 2014 at 4:55 PM, Geert Uytterhoeven
<geert@...ux-m68k.org> wrote:
> Hi Harini,
>
> On Thu, Jul 10, 2014 at 12:33 PM, Harini Katakam
> <harinikatakamlinux@...il.com> wrote:
>> On Thu, Jul 10, 2014 at 3:12 PM, Geert Uytterhoeven
>> <geert@...ux-m68k.org> wrote:
>>> On Thu, Jul 10, 2014 at 11:31 AM, Harini Katakam
>>> <harinikatakamlinux@...il.com> wrote:
>>>>>> +       master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD |
>>>>>> +                           SPI_TX_DUAL | SPI_TX_QUAD;
>>>>>
>>>>> Your driver advertises Dual/Quad SPI Transfer capabilities, but it doesn't
>>>>> check spi_transfer.[tr]x_nbits? How can it determine when to enable Dual/Quad?
>>>>
>>>> Here the driver is just giving information that the controller support it.
>>>> The MTD layer enables dual/quad based on what the flash supports; quad
>>>> being the first priority
>>>> I understand that the spi core reads rx, tx-bus-width property and
>>>> master support flags and
>>>> performs the necessary checks.
>>>
>>> That's correct: as long as the rx, tx-bus-width  properties do not indicate a
>>> Dual or Quad wiring, it won't be used.
>>>
>>> However, based on schematics, someone may set the rx, tx-bus-width properties
>>> to 4, which is correct, as DT describes the hardware. But this will fail to
>>> work.
>>> So I think it's safer not to announce Dual/Quad support in the driver until
>>> the actual driver support is there.
>>
>> OK. Correct me if I'm wrong but announcing this support in master->flags is
>> just to say the controller supports it - Like Punnaiah mentioned in the other
>> mail, nothing specific needs to be done from the controller driver to enable
>> dual/quad support. This is at the SOC/IP level.
>> I agree it might or might not be supported at board-level.
>
> IC. So this is not a generic SPI controller, but a controller meant for QSPI
> FLASHes? I.e. if you would connect a different device, the controller may
> unexpectedly use Dual or Quad mode if it sees a byte fly by that looks like
> a Quad SPI FLASH read command?
>

Yes. It would.

>> But that's based on the user's hardware. Should master->flags
>> really take this into consideration?
>
> You mean master->mode_bits?

Yes, i mean mode_bits. That was typo.

>
>> BTW, I dint see master->mode_bits being used anywhere at the moment.
>
> It is used to match SPI controller and slave features, cfr. spi_setup() in
> drivers/spi/spi.c.
>
> If Dual/Quad is supported, the bits should be set. Else spi_setup() will
> clear the bits in the SPI slave's mode field, disabling Dual/Quad transfers.
>

OK.

Regards,
Harini
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