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Message-ID: <20140711122425.GD12899@arm.com>
Date:	Fri, 11 Jul 2014 13:24:25 +0100
From:	Will Deacon <will.deacon@....com>
To:	Olav Haugan <ohaugan@...eaurora.org>
Cc:	Mark Rutland <Mark.Rutland@....com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-samsung-soc@...r.kernel.org" 
	<linux-samsung-soc@...r.kernel.org>, Arnd Bergmann <arnd@...db.de>,
	Pawel Moll <Pawel.Moll@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Grant Grundler <grundler@...omium.org>,
	Joerg Roedel <joro@...tes.org>,
	Stephen Warren <swarren@...dotorg.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Marc Zyngier <Marc.Zyngier@....com>,
	Linux IOMMU <iommu@...ts.linux-foundation.org>,
	Rob Herring <robh+dt@...nel.org>,
	Thierry Reding <thierry.reding@...il.com>,
	Kumar Gala <galak@...eaurora.org>,
	"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
	Cho KyongHo <pullip.cho@...sung.com>,
	"mitchelh@...eaurora.org" <mitchelh@...eaurora.org>,
	Dave P Martin <Dave.Martin@....com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Hiroshi Doyu <hdoyu@...dia.com>
Subject: Re: [PATCH v2] devicetree: Add generic IOMMU device tree bindings

On Thu, Jul 10, 2014 at 11:32:16PM +0100, Olav Haugan wrote:
> On 7/9/2014 3:54 AM, Will Deacon wrote:
> > On Wed, Jul 09, 2014 at 02:07:38AM +0100, Olav Haugan wrote:
> >> So how does an algorithm figure this out in both my examples? The
> >> algorithm would have to know about both (all) bus masters and their
> >> stream IDs for a specific SMMU. If the algorithm operates on the set of
> >> stream IDs for one bus master at a time the algorithm has no way of
> >> knowing which bits can be ignored since it doesn't know the value of the
> >> other stream IDs for the other bus masters and thus could potentially
> >> create a mask that could cause a stream ID to match in two different
> >> entries.
> > 
> > Complete knowledge of the system topology (i.e. all bus masters) is a
> > requirement for being able to configure the SMMU correctly if you want to
> > guarantee that you don't have SMR aliasing issues.
> 
> So you agree that an algorithm needs to know about all the bus
> masters/stream IDs for a specific IOMMU before it can figure out the
> StreamID masks and how many SMRs can be allocated to a specific bus
> master? Andreas's algorithm does not know about the other bus
> masters/stream IDs. It operates on one bus master at a time.

Right, but it can certainly be improved. There are certain things you can do
without complete knowledge, as I mentioned previously (if you can have
densely packed power-of-2 aligned/sized regions).

> >>>> I am not familiar with Andreas's proposal. Do you have a link?
> >>>
> >>>   http://marc.info/?l=linux-arm-kernel&m=139110598005846&w=2
> >>
> >> Unless I am mistaken the algorithm works on one bus master at a time. I
> >> don't think that will work.
> > 
> > IIRC, it works for densely packed SIDs on the master, so it tries to build
> > up power-of-2 sized groups for that master then mops up the rest with
> > individual entries.
> 
> I ran the algorithm through a few trivial cases:
> 
> 1)
> Stream IDs: 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28
> Number of SMRs: 9
> 
> In this case the algorithm decided to set mask to 0 for all entries
> using up 8 of the SMRs.

Well think about what it's doing... we don't know about SID 0x20, for
example so there's not much it can do.

> 2) Same Stream IDs but only 2 SMRs.
> The algorithm gave an error saying I did not have enough SMRs.

There's a reason this didn't get merged, and it would be great if you could
try to improve the situation ;).

Will
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