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Message-Id: <1405327733-27537-1-git-send-email-srinivas.kandagatla@linaro.org>
Date:	Mon, 14 Jul 2014 09:48:53 +0100
From:	Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
To:	Kishon Vijay Abraham I <kishon@...com>
Cc:	Grant Likely <grant.likely@...aro.org>,
	Rob Herring <robh+dt@...nel.org>, linux-kernel@...r.kernel.org,
	linux-arm-msm@...r.kernel.org, linux-ide@...r.kernel.org,
	Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Subject: [PATCH v3 2/2] phy: qcom: Update APQ8064 PHY device tree bindings

Add binding spec for Qualcomm SoC PHYs, starting with the SATA PHY on
the APQ8064 family of SoCs

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
---
 Documentation/devicetree/bindings/phy/qcom-phy.txt | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/phy/qcom-phy.txt b/Documentation/devicetree/bindings/phy/qcom-phy.txt
index 76bfbd0..6bff1e0 100644
--- a/Documentation/devicetree/bindings/phy/qcom-phy.txt
+++ b/Documentation/devicetree/bindings/phy/qcom-phy.txt
@@ -1,4 +1,4 @@
-Qualcomm IPQ806x SATA PHY Controller
+Qualcomm IPQ806x/APQ8064 SATA PHY Controller
 ------------------------------------
 
 SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
@@ -6,6 +6,7 @@ Each SATA PHY controller should have its own node.
 
 Required properties:
 - compatible: compatible list, contains "qcom,ipq806x-sata-phy"
+	     or "qcom,apq8064-sata-phy".
 - reg: offset and length of the SATA PHY register set;
 - #phy-cells: must be zero
 - clocks: must be exactly one entry
-- 
1.9.1

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