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Message-Id: <1405443709-15288-49-git-send-email-asadi.samuel@gmail.com>
Date:	Tue, 15 Jul 2014 20:01:04 +0300
From:	Sam Asadi <asadi.samuel@...il.com>
To:	gregkh@...uxfoundation.org
Cc:	devel@...verdev.osuosl.org, linux-kernel@...r.kernel.org,
	Russell King <rmk+kernel@....linux.org.uk>,
	sam-the-6 <asadi.samuel@...il.com>
Subject: [PATCH 49/94] ARM: l2c: fix revision checking

From: Russell King <rmk+kernel@....linux.org.uk>

The revision checking in l2c310_enable() was not correct; we were
masking the part number rather than the revision number.  Fix this
to use the correct macro.

Fixes: 4374d64933b1 ("ARM: l2c: add automatic enable of early BRESP")
Signed-off-by: Russell King <rmk+kernel@....linux.org.uk>
Signed-off-by: sam-the-6 <asadi.samuel@...il.com>
---
 arch/arm/mm/cache-l2x0.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 076172b..7c3fb41 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -664,7 +664,7 @@ static int l2c310_cpu_enable_flz(struct notifier_block *nb, unsigned long act, v
 
 static void __init l2c310_enable(void __iomem *base, u32 aux, unsigned num_lock)
 {
-	unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_PART_MASK;
+	unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_RTL_MASK;
 	bool cortex_a9 = read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9;
 
 	if (rev >= L310_CACHE_ID_RTL_R2P0) {
-- 
1.7.10.4

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