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Message-ID: <20140721213534.GB11555@pd.tnic>
Date: Mon, 21 Jul 2014 23:35:34 +0200
From: Borislav Petkov <bp@...en8.de>
To: Andy Lutomirski <luto@...capital.net>
Cc: Peter Zijlstra <peterz@...radead.org>,
Thomas Gleixner <tglx@...utronix.de>, x86-ml <x86@...nel.org>,
lkml <linux-kernel@...r.kernel.org>,
Steven Rostedt <rostedt@...dmis.org>
Subject: Re: [PATCH] x86, TSC: Add a software TSC offset
On Mon, Jul 21, 2014 at 12:34:40PM -0700, Andy Lutomirski wrote:
> I'm sure I'm missing something, but where is tsc_offset used outside
> the tsc startup code? Is it somehow getting programmed into the TSC
> config registers?
Nah, we're programming the CPU number into the TSC_AUX MSR. However,
that approach might become obsolete for a simpler, preempt-disable
version which Peter suggested today. It should be comparatively cheap
and work on all CPUs, not only RDTSCP-supporting ones:
get_cycles() {
preempt_disable();
rdtscll() + this_cpu_read(tsc_offset);
preempt_disable()
}
So, to answer your question, the TSC offset will be used in get_cycles(). So
even on machines with a skewed TSC, we will have a stable TSC counter by
adding the per-cpu offset each time we read the TSC.
We'll see how it plays out in testing. :)
--
Regards/Gruss,
Boris.
Sent from a fat crate under my desk. Formatting is fine.
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