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Message-id: <1405994696-3117-5-git-send-email-cw00.choi@samsung.com>
Date:	Tue, 22 Jul 2014 11:04:56 +0900
From:	Chanwoo Choi <cw00.choi@...sung.com>
To:	jic23@...nel.org
Cc:	ch.naveen@...sung.com, arnd@...db.de, kgene.kim@...sung.com,
	kyungmin.park@...sung.com, t.figa@...sung.com,
	linux-iio@...r.kernel.org, linux-samsung-soc@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org, linux-doc@...r.kernel.org,
	Chanwoo Choi <cw00.choi@...sung.com>
Subject: [PATCHv8 4/4] ARM: dts: Fix wrong compatible string for Exynos3250 ADC

This patchset fix wrong compatible string for Exynos3250 ADC. Exynos3250 SoC
need to control only special clock for ADC. Exynos SoC except for Exynos3250
has not included special clock for ADC. The exynos ADC driver can control
special clock if compatible string is 'exynos3250-adc-v2'.

Signed-off-by: Chanwoo Choi <cw00.choi@...sung.com>
Acked-by: Kyungmin Park <kyungmin.park@...sung.com>
Reviewed-by: Tomasz Figa <t.figa@...sung.com>
Acked-by: Kukjin Kim <kgene.kim@...sung.com>
Acked-by: Arnd Bergmann <arnd@...db.de>
---
 arch/arm/boot/dts/exynos3250.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 15c9c87..767189a 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -407,10 +407,11 @@
 		};
 
 		adc: adc@...C0000 {
-			compatible = "samsung,exynos-adc-v3";
+			compatible = "samsung,exynos3250-adc",
+				     "samsung,exynos-adc-v2";
 			reg = <0x126C0000 0x100>, <0x10020718 0x4>;
 			interrupts = <0 137 0>;
-			clock-names = "adc", "sclk_tsadc";
+			clock-names = "adc", "sclk";
 			clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
 			#io-channel-cells = <1>;
 			io-channel-ranges;
-- 
1.8.0

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