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Date:	Tue, 22 Jul 2014 10:22:33 +0800
From:	Shawn Guo <shawn.guo@...escale.com>
To:	Stefan Agner <stefan@...er.ch>
CC:	<peter.chen@...escale.com>, <s.hauer@...gutronix.de>,
	<b35083@...escale.com>, <linux-arm-kernel@...ts.infradead.org>,
	<linux-usb@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/6] ARM: dts: vf610: add USB PHY and controller

On Fri, Jul 18, 2014 at 07:01:37PM +0200, Stefan Agner wrote:
> This adds USB PHY and USB controller nodes. Vybrid SoCs have two
> independent USB cores which each supports DR (dual role). However,
> real OTG is not supported since the OTG ID pin is not available.
> 
> The PHYs are located within the anadig register range, hence we need
> to change the length of the anadig registers.
> 
> Signed-off-by: Stefan Agner <stefan@...er.ch>
> ---
>  arch/arm/boot/dts/vf610.dtsi | 46 +++++++++++++++++++++++++++++++++++++++++---
>  1 file changed, 43 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
> index 6a6190c..f6c3f02 100644
> --- a/arch/arm/boot/dts/vf610.dtsi
> +++ b/arch/arm/boot/dts/vf610.dtsi
> @@ -25,6 +25,8 @@
>  		gpio2 = &gpio3;
>  		gpio3 = &gpio4;
>  		gpio4 = &gpio5;
> +		usbphy0 = &usbphy0;
> +		usbphy1 = &usbphy1;
>  	};
>  
>  	cpus {
> @@ -285,9 +287,25 @@
>  				gpio-ranges = <&iomuxc 0 128 7>;
>  			};
>  
> -			anatop@...50000 {
> -				compatible = "fsl,vf610-anatop";
> -				reg = <0x40050000 0x1000>;
> +			anatop: anatop@...50000 {
> +				compatible = "fsl,vf610-anatop", "syscon";
> +				reg = <0x40050000 0x400>;
> +			};
> +
> +			usbphy0: usbphy@...50800 {
> +				compatible = "fsl,vf610-usbphy", "fsl,imx23-usbphy";

Since phy driver will match "fsl,vf610-usbphy" anyway, we do not need
"fsl,imx23-usbphy" here.

> +				reg = <0x40050800 0x400>;
> +				interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks VF610_CLK_USBPHY0>;
> +				fsl,anatop = <&anatop>;
> +			};
> +
> +			usbphy1: usbphy@...50c00 {
> +				compatible = "fsl,vf610-usbphy", "fsl,imx23-usbphy";
> +				reg = <0x40050c00 0x400>;
> +				interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks VF610_CLK_USBPHY1>;
> +				fsl,anatop = <&anatop>;
>  			};
>  
>  			i2c0: i2c@...66000 {
> @@ -309,6 +327,18 @@
>  				reg = <0x4006b000 0x1000>;
>  				#clock-cells = <1>;
>  			};
> +
> +			usbdev0: usb@...34000 {
> +				compatible = "fsl,imx6q-usb", "fsl,imx27-usb";

It doesn't really make any sense to have "fsl,imx6q-usb" here.  The
following one should be less confusing.

	compatible = "fsl,vf610-usb", "fsl,imx27-usb";

Shawn

> +				reg = <0x40034000 0x800>;
> +				interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks VF610_CLK_USBC0>;
> +				fsl,usbphy = <&usbphy0>;
> +				dr_mode = "peripheral";
> +				status = "disabled";
> +			};
> +
> +
>  		};
>  
>  		aips1: aips-bus@...80000 {
> @@ -371,6 +401,16 @@
>  				status = "disabled";
>  			};
>  
> +			usbh1: usb@...b4000 {
> +				compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
> +				reg = <0x400b4000 0x800>;
> +				interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks VF610_CLK_USBC1>;
> +				fsl,usbphy = <&usbphy1>;
> +				dr_mode = "host";
> +				status = "disabled";
> +			};
> +
>  			ftm: ftm@...b8000 {
>  				compatible = "fsl,ftm-timer";
>  				reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
> -- 
> 2.0.1
> 
--
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