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Message-ID: <53CF822E.7050601@amd.com>
Date: Wed, 23 Jul 2014 11:36:46 +0200
From: Christian König <christian.koenig@....com>
To: Daniel Vetter <daniel.vetter@...ll.ch>
CC: Christian König <deathsimple@...afone.de>,
"Maarten Lankhorst" <maarten.lankhorst@...onical.com>,
Thomas Hellstrom <thellstrom@...are.com>,
nouveau <nouveau@...ts.freedesktop.org>,
LKML <linux-kernel@...r.kernel.org>,
dri-devel <dri-devel@...ts.freedesktop.org>,
Ben Skeggs <bskeggs@...hat.com>,
"Deucher, Alexander" <alexander.deucher@....com>
Subject: Re: [Nouveau] [PATCH 09/17] drm/radeon: use common fence implementation
for fences
Am 23.07.2014 11:30, schrieb Daniel Vetter:
> On Wed, Jul 23, 2014 at 11:27 AM, Christian König
> <christian.koenig@....com> wrote:
>> You submit a job to the hardware and then block the job to wait for radeon
>> to be finished? Well than this would indeed require a hardware reset, but
>> wouldn't that make the whole problem even worse?
>>
>> I mean currently we block one userspace process to wait for other hardware
>> to be finished with a buffer, but what you are describing here blocks the
>> whole hardware to wait for other hardware which in the end blocks all
>> userspace process accessing the hardware.
> There is nothing new here with prime - if one context hangs the gpu it
> blocks everyone else on i915.
>
>> Talking about alternative approaches wouldn't it be simpler to just offload
>> the waiting to a different kernel or userspace thread?
> Well this is exactly what we'll do once we have the scheduler. But
> this is an orthogonal issue imo.
Mhm, could have the scheduler first?
Cause that sounds like reducing the necessary fence interface to just a
fence->wait function.
Christian.
> -Daniel
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