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Message-ID: <CAKMK7uG+JuShi56gVkBc=vg+wsPiojixV7shH0ucY5av8HKhVg@mail.gmail.com>
Date: Wed, 23 Jul 2014 14:42:07 +0200
From: Daniel Vetter <daniel.vetter@...ll.ch>
To: Christian König <christian.koenig@....com>
Cc: Maarten Lankhorst <maarten.lankhorst@...onical.com>,
Christian König <deathsimple@...afone.de>,
Thomas Hellstrom <thellstrom@...are.com>,
nouveau <nouveau@...ts.freedesktop.org>,
LKML <linux-kernel@...r.kernel.org>,
dri-devel <dri-devel@...ts.freedesktop.org>,
Ben Skeggs <bskeggs@...hat.com>,
"Deucher, Alexander" <alexander.deucher@....com>
Subject: Re: [Nouveau] [PATCH 09/17] drm/radeon: use common fence
implementation for fences
On Wed, Jul 23, 2014 at 2:36 PM, Christian König
<christian.koenig@....com> wrote:
> My idea was more that the fence framework provides a
> fence->process_signaling callback that is periodically called after
> enable_signaling is called to trigger manual signal processing in the
> driver.
>
> This would both be suitable as a fallback in case of not working interrupts
> as well as a chance for any driver to do necessary lockup handling.
Imo that should be an implementation detail of the fence provider. So
in ->enable_signaling radeon needs to arm a delayed work to regularly
check fence and signal them if the irq failed. If it's a common need
we might provide some shared code for this (e.g. a struct
unreliable_fence or so). But this shouldn't be mandatory since not all
gpus are broken like that.
And if we force other drivers to care for this special case that imo
leaks the abstraction out of radeon (or any other driver with
unreliable interrupts).
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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