[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <yq1r41bkgdp.fsf@sermon.lab.mkp.net>
Date: Wed, 23 Jul 2014 15:46:26 -0400
From: "Martin K. Petersen" <martin.petersen@...cle.com>
To: Sreekanth Reddy <sreekanth.reddy@...gotech.com>
Cc: "Martin K. Petersen" <martin.petersen@...cle.com>, jejb@...nel.org,
"James E.J. Bottomley" <JBottomley@...allels.com>,
linux-scsi@...r.kernel.org,
Sathya Prakash <Sathya.Prakash@...gotech.com>,
Nagalakshmi Nandigama <Nagalakshmi.Nandigama@...gotech.com>,
linux-kernel@...r.kernel.org, Christoph Hellwig <hch@...radead.org>
Subject: Re: [RESEND][PATCH 07/10][SCSI]mpt2sas: Added Reply Descriptor Post Queue (RDPQ) Array support
>>>>> "Sreekanth" == Sreekanth Reddy <sreekanth.reddy@...gotech.com> writes:
Sreekanth,
Sreekanth> 2. As per MPI Spec, each set of 8 reply descriptor post
Sreekanth> queues must have the same value for the upper 32-bits of
Sreekanth> their memory address. So allocated set of eight queues in a
Sreekanth> single pool and added a new function is_MSB_are_same() to
Sreekanth> check whether higher 32 bits of this pool memory address are
Sreekanth> same or not. If this functions returns zero then we are
Sreekanth> saving these pools in the bad_reply_post_pool list. then
Sreekanth> releasing these pools once we get the required memory pools.
Why don't you just set pci_set_consistent_dma_mask() to DMA_BIT_MASK(32)
before you allocate the queue entries?
--
Martin K. Petersen Oracle Linux Engineering
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists