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Date:	Sun, 27 Jul 2014 19:49:42 +0100
From:	Mark Brown <broonie@...nel.org>
To:	Mark Rutland <mark.rutland@....com>
Cc:	Maxime Ripard <maxime.ripard@...e-electrons.com>,
	Dan Williams <dan.j.williams@...el.com>,
	Vinod Koul <vinod.koul@...el.com>,
	"andriy.shevchenko@...el.com" <andriy.shevchenko@...el.com>,
	Arnd Bergmann <arnd@...db.de>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"zhuzhenhua@...winnertech.com" <zhuzhenhua@...winnertech.com>,
	"dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
	"linux-sunxi@...glegroups.com" <linux-sunxi@...glegroups.com>,
	"kevin.z.m.zh@...il.com" <kevin.z.m.zh@...il.com>,
	"sunny@...winnertech.com" <sunny@...winnertech.com>,
	"shuge@...winnertech.com" <shuge@...winnertech.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v10 2/2] dmaengine: sun6i: Add driver for the Allwinner
 A31 DMA controller

On Tue, Jul 01, 2014 at 01:48:52PM +0100, Mark Rutland wrote:
> On Tue, Jul 01, 2014 at 08:21:19AM +0100, Maxime Ripard wrote:

> > > It feels a little fragile to rely on the organisation of the clock tree
> > > and the naming thereof. If the IP block is ever reused on an SoC with a
> > > different clock tree layout then we have to handle things differently.
> > 
> > What do you suggest then?
> 
> I will admit that I don't have a better suggestion.
> 
> Without knowing which particular constraint on the mux parent clock we
> care about it's difficult to suggest anything useful.

There's supposed to be facilities appearing in the generic clock code
for specifying default clock tree configurations via the DT - it's quite
a common requirement after all.  It sounds like that should be able to
do the job here.  Not sure if these have gone in yet or not but there's
quite a bit of demand.

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