linux-kernel - Re: [PATCH v3 1/4] mfd: pm8xxx-spmi: add support for Qualcomm SPMI PMICs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <53DAA82D.4020901@codeaurora.org>
Date:	Thu, 31 Jul 2014 13:33:49 -0700
From:	David Collins <collinsd@...eaurora.org>
To:	Stanimir Varbanov <svarbanov@...sol.com>
CC:	Lee Jones <lee.jones@...aro.org>,
	Samuel Ortiz <sameo@...ux.intel.com>,
	linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Pawel Moll <pawel.moll@....com>,
	Rob Herring <robh+dt@...nel.org>,
	Kumar Gala <galak@...eaurora.org>,
	Mark Rutland <mark.rutland@....com>,
	Grant Likely <grant.likely@...aro.org>,
	Courtney Cavin <courtney.cavin@...ymobile.com>,
	Bjorn Andersson <bjorn.andersson@...ymobile.com>,
	Josh Cartwright <joshc@...eaurora.org>,
	Stephen Boyd <sboyd@...eaurora.org>
Subject: Re: [PATCH v3 1/4] mfd: pm8xxx-spmi: add support for Qualcomm SPMI
 PMICs

On 07/31/2014 01:48 AM, Stanimir Varbanov wrote:
> Hi David,
> 
> Thanks for the comments!
> 
> On 07/30/2014 12:54 AM, David Collins wrote:
>> On 07/24/2014 05:45 AM, Stanimir Varbanov wrote:
>>> From: Josh Cartwright <joshc@...eaurora.org>
>>>
>>> The Qualcomm SPMI PMIC chips are components used with the
>>> Snapdragon 800 series SoC family.  This driver exists
>>> largely as a glue mfd component, it exists to be an owner
>>> of an SPMI regmap for children devices described in
>>> device tree.

(...)
>>> +static const struct regmap_config pm8xxx_regmap_config = {
>>> +	.reg_bits	= 16,
>>> +	.val_bits	= 8,
>>> +	.max_register	= 0xffff,
>>
>> Can you please add the following line here?
>>
>> 	.fast_io	= true;
>>
>> This will cause a spinlock to be held during SPMI transactions instead of
>> a mutex lock.  This is needed because several downstream peripheral
>> drivers need to make SPMI read and write calls from atomic context.  I
>> have commented on this point in a previous thread with specific examples [2].
> 
> OK, I understand the need of atomic context, but pmic_arb_read_cmd() and
> pmic_arb_write_cmd() functions use raw_spin_lock_irqsave already. Isn't
> those locks enough?

No, that isn't sufficient.  The problem is that the peripheral driver
would already be in atomic context at the time that it needs to perform an
SPMI read or write via regmap_read() or regmap_write() respectively.
These regmap calls would take a mutex lock if fast_io == false.  This is
not allowed since calling a sleepable function in atomic context can lead
to deadlock.

Take care,
David

-- 
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/