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Message-Id: <1406841985-15790-5-git-send-email-kever.yang@rock-chips.com>
Date: Thu, 31 Jul 2014 14:26:24 -0700
From: Kever Yang <kever.yang@...k-chips.com>
To: Paul Zimmerman <paulz@...opsys.com>, heiko@...ech.de
Cc: dianders@...omium.org, olof@...om.net, sonnyrao@...omium.org,
addy.ke@...k-chips.com, cf@...k-chips.com, xjq@...k-chips.com,
wulf@...k-chips.com, lyz@...k-chips.com, hj@...k-chips.com,
huangtao@...k-chips.com, Kever Yang <kever.yang@...k-chips.com>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Russell King <linux@....linux.org.uk>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [REPOST PATCH v3 4/5] ARM: dts: Fix the sort ordering of EHCI and HSIC in rk3288.dtsi
From: Doug Anderson <dianders@...omium.org>
The EHCI and HSIC device tree nodes were added in the wrong place.
Fix them.
Signed-off-by: Doug Anderson <dianders@...omium.org>
Signed-off-by: Kever Yang <kever.yang@...k-chips.com>
---
Changes in v3:
- EHCI and HSIC move new for version 3.
Changes in v2: None
arch/arm/boot/dts/rk3288.dtsi | 41 ++++++++++++++++++++---------------------
1 file changed, 20 insertions(+), 21 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index a5607a1..673dee3 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -205,6 +205,17 @@
status = "disabled";
};
+ usb_host0_ehci: ehci@...00000 {
+ compatible = "generic-ehci";
+ reg = <0xff500000 0x100>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_USBHOST0>;
+ clock-names = "usbhost";
+ status = "disabled";
+ };
+
+ /* NOTE: ohci@...20000 doesn't actually work on hardware */
+
usb_host1: usb@...40000 {
compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
"snps,dwc2";
@@ -225,6 +236,15 @@
status = "disabled";
};
+ usb_hsic: ehci@...c0000 {
+ compatible = "generic-ehci";
+ reg = <0xff5c0000 0x100>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_HSIC>;
+ clock-names = "usbhost";
+ status = "disabled";
+ };
+
uart2: serial@...90000 {
compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
reg = <0xff690000 0x100>;
@@ -319,27 +339,6 @@
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
-
- usb_host0_ehci: ehci@...00000 {
- compatible = "generic-ehci";
- reg = <0xff500000 0x100>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_USBHOST0>;
- clock-names = "usbhost";
- status = "disabled";
- };
-
- /* NOTE: ohci@...20000 doesn't actually work on hardware */
-
- usb_hsic: ehci@...c0000 {
- compatible = "generic-ehci";
- reg = <0xff5c0000 0x100>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_HSIC>;
- clock-names = "usbhost";
- status = "disabled";
- };
-
gic: interrupt-controller@...01000 {
compatible = "arm,gic-400";
interrupt-controller;
--
1.7.9.5
--
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