linux-kernel - Re: [PATCH 8/9] Add devicetree bindings for Rockchip Soc EDP

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Message-ID: <4758549.OE3inCP7ZI@diego>
Date:	Mon, 04 Aug 2014 21:39:34 +0200
From:	Heiko Stübner <heiko@...ech.de>
To:	mark yao <yzq@...k-chips.com>
Cc:	Rob Clark <robdclark@...il.com>, Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Randy Dunlap <rdunlap@...radead.org>,
	David Airlie <airlied@...ux.ie>,
	Grant Likely <grant.likely@...aro.org>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	John Stultz <john.stultz@...aro.org>,
	Rom Lemarchand <romlem@...gle.com>, devicetree@...r.kernel.org,
	linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
	dri-devel@...ts.freedesktop.org, linux-api@...r.kernel.org,
	olof@...om.net, djkurtz@...omium.org, xjq@...k-chips.com,
	kfx@...k-chips.com, cym@...k-chips.com, cf@...k-chips.com,
	zyw@...k-chips.com, zwl@...k-chips.com, xxm@...k-chips.com,
	huangtao@...k-chips.com, kever.yang@...k-chips.com,
	zhangqing@...k-chips.com, yxj@...k-chips.com, wxt@...k-chips.com,
	xw@...k-chips.com
Subject: Re: [PATCH 8/9] Add devicetree bindings for Rockchip Soc EDP

Am Montag, 4. August 2014, 12:55:59 schrieb mark yao:
> Signed-off-by: mark yao <yzq@...k-chips.com>
> ---
>  .../devicetree/bindings/video/rockchip-panel.txt   |   34
> ++++++++++++++++++++ 1 file changed, 34 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/video/rockchip-panel.txt
> b/Documentation/devicetree/bindings/video/rockchip-panel.txt index
> f599806..f6d80f6 100644
> --- a/Documentation/devicetree/bindings/video/rockchip-panel.txt
> +++ b/Documentation/devicetree/bindings/video/rockchip-panel.txt
> @@ -80,3 +80,37 @@ Example:
>  		rockchip,data-width = <24>;
>  		rockchip,panel = <&panel>;
>  	};
> +
> +Rockchip RK3288 EDP interface
> +================================
> +Required properties:
> +-compatible: "rockchip,rk3288-edp";
> +
> +- reg: physical base address of the controller and length
> +- clocks: from common clock binding: handle to dp clock.
> +	of memory mapped region.
> +- clock-names: from common clock binding:
> +	Required elements: "clk_edp"
> +			"clk_edp_24m"
> +			"clk_edp_24m_parent"
> +			"pclk_edp"
> +- rockchip,grf: this soc should set GRF regs, so need get grf here.
> +- resets: Must contain an entry for each entry in reset-names.
> +	See ../reset/reset.txt for details.
> +- reset-names: Must include the following entries:
> +  - edp
> +- rockchip,panel: required a panel node
> +
> +Example:
> +	edp: edp@...70000 {
> +		compatible = "rockchip,rk3288-edp";
> +                reg = <0xff970000 0x4000>;
> +                interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
> +                clocks = <&cru SCLK_EDP>, <&cru SCLK_EDP_24M>, <&cru
> PCLK_EDP_CTRL>, <&xin24m>; +                clock-names = "clk_edp",
> "clk_edp_24m", "pclk_edp", "clk_edp_24m_parent"; +

clk_epd_24m_parent is not part of the hardware, so instead of referencing the 
target-parent as part of the device clocks, the new
	"clk: Support for clock parents and rates assigned from device tree"
should be used for setting the target parent - so the re-parenting code should 
also move out of the driver.

This commit [0] is part of the clk-pull request and thus will most likely be 
part of 3.17.


Heiko

[0] 
http://git.linaro.org/people/mike.turquette/linux.git/commitdiff/86be408bfbd846fab3c4ac21d6f9298bd2e4b790?hp=09575693a2511b5ddae0105546e0d9cefc936e34



> +                rockchip,grf = <&grf>;
> +                resets = <&cru 111>;
> +                reset-names = "edp";
> +		rockchip,panel = <&panel>;
> +	};

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