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Message-Id: <1407249324-8568-1-git-send-email-tomeu.vizoso@collabora.com>
Date:	Tue,  5 Aug 2014 16:35:22 +0200
From:	Tomeu Vizoso <tomeu.vizoso@...labora.com>
To:	linux-pm@...r.kernel.org
Cc:	Thierry Reding <thierry.reding@...il.com>,
	Terje Bergström <tbergstrom@...dia.com>,
	Stephen Warren <swarren@...dotorg.org>,
	"Rafael J. Wysocki" <rjw@...ysocki.net>,
	Pavel Machek <pavel@....cz>, Len Brown <len.brown@...el.com>,
	linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
	Tomeu Vizoso <tomeu.vizoso@...labora.com>
Subject: [RFC 0/2] Add PM_QOS_MEMORY_BANDWIDTH class

Hi,

I need a way for device drivers to register their needs of memory bandwidth so
the optimal frequency for the memory bus clock can be set.

Adding one more pm_qos class and a PM_QOS_SUM class type seems to accomplish
that neatly, so I'm asking for comments on these very simple patches.

The patch to drm/tegra isn't really functional because the EMC clock
implementation [0] hasn't been merged yet, and I'm not posting an
implementation of a notification listener because in my platform that would be
the EMC driver which is still under discussion as well.

This will be most useful once we have per-user clock constraints [1], so the
EMC driver can set one more floor frequency that together with the other
constraints would lead to the effective rate of the memory bus.

Thanks,

Tomeu

[0] http://article.gmane.org/gmane.linux.kernel/1744817
[1] http://article.gmane.org/gmane.linux.kernel/1760039

Tomeu Vizoso (2):
  PM / QoS: Add PM_QOS_MEMORY_BANDWIDTH class
  drm/tegra: Request memory bandwidth for the display controller

 drivers/gpu/drm/tegra/dc.c  | 11 +++++++++++
 drivers/gpu/drm/tegra/drm.h |  2 ++
 include/linux/pm_qos.h      |  5 ++++-
 kernel/power/qos.c          | 27 ++++++++++++++++++++++++++-
 4 files changed, 43 insertions(+), 2 deletions(-)

-- 
1.9.3

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