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Message-ID: <20140805030140.GJ3711@ld-irv-0074>
Date:	Mon, 4 Aug 2014 20:01:40 -0700
From:	Brian Norris <computersforpeace@...il.com>
To:	bpqw <bpqw@...ron.com>
Cc:	"dwmw2@...radead.org" <dwmw2@...radead.org>,
	"b32955@...escale.com" <b32955@...escale.com>,
	"artem.bityutskiy@...ux.intel.com" <artem.bityutskiy@...ux.intel.com>,
	"ron@...ian.org" <ron@...ian.org>,
	"u.kleine-koenig@...gutronix.de" <u.kleine-koenig@...gutronix.de>,
	"ezequiel.garcia@...e-electrons.com" 
	<ezequiel.garcia@...e-electrons.com>,
	"linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: Subject: [PATCH 1/1] mtd:nand:fix nand_lock/unlock() function

On Tue, Aug 05, 2014 at 01:54:07AM +0000, bpqw wrote:
> From 0304e9618d8c3ef5360b611f881f1b1bed08be06 Mon Sep 17 00:00:00 2001
> From: White Ding <bpqw@...ron.com>
> Date: Thu, 24 Jul 2014 00:10:45 +0800
> Subject: [PATCH 1/1] mtd:nand:fix nand_lock/unlock() function
> 
> Do nand reset before write protect check.
> 
> If we want to check the WP# low or high through STATUS READ and check bit 7,
> we must reset the device, other operation (eg.erase/program a locked block) can
> also clear the bit 7 of status register.
> 
> As we know the status register can be refreshed, if we do some operation to trigger it,
> for example if we do erase/program operation to one block that is locked, then READ STATUS,
> the bit 7 of READ STATUS will be 0 indicate the device in write protect, then if we do
> erase/program operation to another block that is unlocked, the bit 7 of READ STATUS will
> be 1 indicate the device is not write protect.
> Suppose we checked the bit 7 of READ STATUS is 0 then judge the WP# is low (write protect),
> but in this case the WP# maybe high if we do erase/program operation to a locked block, 
> so we must reset the device if we want to check the WP# low or high through STATUS READ and 
> check bit 7.
> 
> Signed-off-by: White Ding <bpqw@...ron.com>

Thanks. Queued to l2-mtd.git/next.

Brian
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