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Message-ID: <A2CA0424C0A6F04399FB9E1CD98E0304844C4DF6@US01WEMBX2.internal.synopsys.com>
Date: Thu, 7 Aug 2014 18:26:02 +0000
From: Paul Zimmerman <Paul.Zimmerman@...opsys.com>
To: Kever Yang <kever.yang@...k-chips.com>,
"heiko@...ech.de" <heiko@...ech.de>
CC: "dianders@...omium.org" <dianders@...omium.org>,
"olof@...om.net" <olof@...om.net>,
"sonnyrao@...omium.org" <sonnyrao@...omium.org>,
"addy.ke@...k-chips.com" <addy.ke@...k-chips.com>,
"cf@...k-chips.com" <cf@...k-chips.com>,
"xjq@...k-chips.com" <xjq@...k-chips.com>,
"wulf@...k-chips.com" <wulf@...k-chips.com>,
"lyz@...k-chips.com" <lyz@...k-chips.com>,
"hj@...k-chips.com" <hj@...k-chips.com>,
"huangtao@...k-chips.com" <huangtao@...k-chips.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
"linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v4 2/4] usb: dwc2: add compatible data for rockchip soc
> From: Kever Yang [mailto:kever.yang@...il.com] On Behalf Of Kever Yang
> Sent: Thursday, August 07, 2014 2:35 AM
>
> This patch add compatible data for dwc2 controller found on
> rk3066, rk3188 and rk3288 processors from rockchip.
>
> Signed-off-by: Kever Yang <kever.yang@...k-chips.com>
> Acked-by: Paul Zimmerman <paulz@...opsys.com>
> ---
>
> Changes in v4:
> - max_transfer_size change to 65536, this should be enough
> for most transfer, the hardware auto-detect will set this
> to 0x7ffff which may make dma_alloc_coherent fail when
> non-dword aligned buf from driver like usbnet happen.
Hi Kever,
Did you test this change thoroughly? I have vague memories of any
value above 65535 causing problems, at least on my hardware. And I
see it is set to 65535 in both pci.c and platform.c. I could be
wrong, but I thought I should mention it.
--
Paul
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