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Date:	Fri, 08 Aug 2014 08:39:05 +0800
From:	Kever Yang <>
To:	Paul Zimmerman <>,
	"" <>
CC:	"" <>,
	"" <>,
	"" <>,
	"" <>,
	"" <>,
	"" <>,
	"" <>,
	"" <>,
	"" <>,
	"" <>,
	Greg Kroah-Hartman <>,
	"" <>,
	"" <>
Subject: Re: [PATCH v4 2/4] usb: dwc2: add compatible data for rockchip soc


On 08/08/2014 02:26 AM, Paul Zimmerman wrote:
>> From: Kever Yang [] On Behalf Of Kever Yang
>> Sent: Thursday, August 07, 2014 2:35 AM
>> This patch add compatible data for dwc2 controller found on
>> rk3066, rk3188 and rk3288 processors from rockchip.
>> Signed-off-by: Kever Yang <>
>> Acked-by: Paul Zimmerman <>
>> ---
>> Changes in v4:
>> - max_transfer_size change to 65536, this should be enough
>>    for most transfer, the hardware auto-detect will set this
>>    to 0x7ffff which may make dma_alloc_coherent fail when
>>    non-dword aligned buf from driver like usbnet happen.
> Hi Kever,
> Did you test this change thoroughly? I have vague memories of any
> value above 65535 causing problems, at least on my hardware. And I
> see it is set to 65535 in both pci.c and platform.c. I could be
> wrong, but I thought I should mention it.
I test it on rk3288 evb, it works find with 65536, I'm sorry for didn't 
mention it in my patch.
The problem in my platform is if the value use hardware auto-detect, it 
will be 0x7ffff,
and that will cause the dma_alloc_coherent fail in hcd driver.

The value less than 0x7ffff should be fine for hardware, but for the 
software, it depends on
how we use it.

What kind of problem did you met? Software problem or hardware problem? 
Maybe I should
pay more attention for this value. :)


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