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Date:	Fri, 8 Aug 2014 15:02:46 +0800
From:	Shengjiu Wang <shengjiu.wang@...escale.com>
To:	<shawn.guo@...escale.com>, <kernel@...gutronix.de>,
	<linux@....linux.org.uk>, <robh+dt@...nel.org>,
	<pawel.moll@....com>, <mark.rutland@....com>,
	<ijc+devicetree@...lion.org.uk>, <galak@...eaurora.org>
CC:	<shengjiu.wang@...escale.com>, <Guangyu.Chen@...escale.com>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>
Subject: [PATCH V3 0/3] refine clock tree for esai in imx6q

refine clock tree for esai in imx6q

Changes for V3
- Drop patch3, for waiting bypass mode implementation.
- As Lucas Stach suggestion, add new API for exclusive clock.

Changes for V2
- Add pll5_sel And update the comments for patch 2.
- As the bypass mode is not supported in clk tree, so update the 
- comments for patch 3.


Shengjiu Wang (3):
  ARM: clk-imx6q: refine clock tree for ESAI
  ARM: clk-gate2: Add API imx_clk_gate2_exclusive for clk_gate2
  ARM: clk-imx6q: Add missing lvds and anaclk clock to the clock tree

 arch/arm/mach-imx/clk-gate2.c             |   18 +++++++++++++++++-
 arch/arm/mach-imx/clk-imx6q.c             |   25 ++++++++++++++++++-------
 arch/arm/mach-imx/clk.h                   |    2 ++
 include/dt-bindings/clock/imx6qdl-clock.h |   13 ++++++++++---
 4 files changed, 47 insertions(+), 11 deletions(-)

-- 
1.7.9.5

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