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Message-ID: <20140812212757.GY17528@sirena.org.uk>
Date:	Tue, 12 Aug 2014 22:27:57 +0100
From:	Mark Brown <broonie@...nel.org>
To:	Javier Martinez Canillas <javier.martinez@...labora.co.uk>
Cc:	Kukjin Kim <kgene.kim@...sung.com>,
	Doug Anderson <dianders@...omium.org>,
	Olof Johansson <olof@...om.net>,
	Yuvaraj Kumar C D <yuvaraj.cd@...il.com>,
	linux-samsung-soc@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 6/6] ARM: dts: Add tps65090 FETs constraints

On Tue, Aug 12, 2014 at 08:49:29PM +0200, Javier Martinez Canillas wrote:

> So, is adding these voltages ranges (the design limits) in the Peach Pit DTS
> file directly an acceptable solution? Basically what my previous patch [0] did.

> That matches what is in the board schematic so I assume that it's safe to use
> these voltage ranges for that machine. If so I'll drop this series and repost
> that patch fixing the typo error and commit message pointed by Doug that were
> already addressed in $subject.

Well, I think the question is if you understand where those numbers come
from and if they make sense.  I've not seen the schematic for the board
so I can't comment but it is quite unusual to see ranges listed for so
many supplies, for things like SD it's obviously normal but things like
video_mid are a bit more surprising.  Does anything actually vary those
voltages?

The change where you fix up the supply mappings still makes sense of
course.

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