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Date:	Mon, 18 Aug 2014 10:16:02 +0300
From:	"Ivan T. Ivanov" <iivanov@...sol.com>
To:	Daniel <delta.tatham@...com>
Cc:	Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Bjorn Andersson <bjorn.andersson@...ymobile.com>,
	linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/6] pinctrl: Device tree bindings for Qualcomm
 pm8xxx gpio block

On Sat, 2014-08-16 at 16:24 +0100, Daniel wrote:
> @Ivan: sorry about the double post.
> 
> Am 11.08.2014 um 16:40 schrieb Ivan T. Ivanov <iivanov@...sol.com>:
> > diff --git a/include/dt-bindings/pinctrl/qcom,pmic-gpio.h b/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
> > new file mode 100644
> > index 0000000..994e748
> > --- /dev/null
> > +++ b/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
> > @@ -0,0 +1,107 @@
> > +/*
> > + * This header provides constants for the Qualcomm PMIC gpio binding.
> > + */
> > +
> > +#ifndef _DT_BINDINGS_PINCTRL_QCOM_PMIC_GPIO_H
> > +#define _DT_BINDINGS_PINCTRL_QCOM_PMIC_GPIO_H
> > +
> > +#define PMIC_GPIO_PULL_UP_30		1
> > +#define PMIC_GPIO_PULL_UP_1P5		2
> > +#define PMIC_GPIO_PULL_UP_31P5		3
> > +#define PMIC_GPIO_PULL_UP_1P5_30	4
> 
> Looking at drivers/pinctrl/qcom/pinctrl-ssbi-pmic.c, shouldn't these defines start at 0?
> e.g. #define PMIC_GPIO_PULL_UP_30 	0
> 

Initially "bias-pull-up" was used to set this parameter. 
Zero value for "bias-pull-up" has special meaning "...the 
pin is connected to VDD...". So values in DTS have to have
offset by one. Micro Amps are non-standard for pull-ups, 
thats why I have changed this to "qcom,pull-up-strength", but I 
have made mistake in config_set function. Following patch should 
fix the issue. I will send updated version soon.

> However, I still cannot get any data from those 2 pins if I export them through /sys/class/gpio...

Ensure that you are exporting the right gpio number. 

# cat /sys/kernel/debug/gpio

Will tell you correct gpio range for registered gpio chips.

> 
> Device: Nexus 7 2013 WiFi
> Board: APQ8064

Thanks for testing this.

Regards,
Ivan

---
 drivers/pinctrl/qcom/pinctrl-ssbi-pmic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-pmic.c
b/drivers/pinctrl/qcom/pinctrl-ssbi-pmic.c
index 9a1b443..dd424f4 100644
--- a/drivers/pinctrl/qcom/pinctrl-ssbi-pmic.c
+++ b/drivers/pinctrl/qcom/pinctrl-ssbi-pmic.c
@@ -446,7 +446,7 @@ static int pm8xxx_gpio_config_set(struct pinctrl_dev
*pctldev,
 				dev_err(pctrl->dev, "invalid pull-up level\n");
 				return -EINVAL;
 			}
-			pin->bias = arg - PM8XXX_GPIO_BIAS_PU_30;
+			pin->bias = arg - PMIC_GPIO_PULL_UP_30;
 			banks |= BIT(2);
 			pin->disable = 0;
 			banks |= BIT(3);



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