lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Tue, 19 Aug 2014 19:36:11 +0800
From:	Hanjun Guo <hanjun.guo@...aro.org>
To:	Sudeep Holla <sudeep.holla@....com>,
	Catalin Marinas <Catalin.Marinas@....com>,
	"Rafael J. Wysocki" <rjw@...ysocki.net>,
	Mark Rutland <Mark.Rutland@....com>
CC:	"graeme.gregory@...aro.org" <graeme.gregory@...aro.org>,
	Arnd Bergmann <arnd@...db.de>, Olof Johansson <olof@...om.net>,
	"grant.likely@...aro.org" <grant.likely@...aro.org>,
	Will Deacon <Will.Deacon@....com>,
	Jason Cooper <jason@...edaemon.net>,
	Marc Zyngier <Marc.Zyngier@....com>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Daniel Lezcano <daniel.lezcano@...aro.org>,
	Mark Brown <broonie@...nel.org>, Rob Herring <robh@...nel.org>,
	Robert Richter <rric@...nel.org>,
	Lv Zheng <lv.zheng@...el.com>,
	Robert Moore <robert.moore@...el.com>,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@....com>,
	Liviu Dudau <Liviu.Dudau@....com>,
	Randy Dunlap <rdunlap@...radead.org>,
	Charles Garcia-Tobin <Charles.Garcia-Tobin@....com>,
	"linux-acpi@...r.kernel.org" <linux-acpi@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linaro-acpi@...ts.linaro.org" <linaro-acpi@...ts.linaro.org>
Subject: Re: [PATCH v2 10/18] ARM64 / ACPI: Introduce ACPI_IRQ_MODEL_GIC and
 register device's gsi

On 2014-8-19 2:34, Sudeep Holla wrote:
> 
> 
> On 04/08/14 16:28, Hanjun Guo wrote:
>> Introduce ACPI_IRQ_MODEL_GIC which is needed for ARM64 as GIC is
>> used, and then register device's gsi with the core IRQ subsystem.
>>
>> acpi_register_gsi() is similar to DT based irq_of_parse_and_map(),
>> since gsi is unique in the system, so use hwirq number directly
>> for the mapping.
>>
>> Originally-by: Amit Daniel Kachhap <amit.daniel@...sung.com>
>> Signed-off-by: Hanjun Guo <hanjun.guo@...aro.org>
>> ---
>>   arch/arm64/kernel/acpi.c |   73 ++++++++++++++++++++++++++++++++++++++++++++++
>>   drivers/acpi/bus.c       |    3 ++
>>   include/linux/acpi.h     |    1 +
>>   3 files changed, 77 insertions(+)
>>
>> diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
>> index ac7ab34..621ced8 100644
>> --- a/arch/arm64/kernel/acpi.c
>> +++ b/arch/arm64/kernel/acpi.c
>> @@ -34,6 +34,12 @@ EXPORT_SYMBOL(acpi_pci_disabled);
>>   static int enabled_cpus;    /* Processors (GICC) with enabled flag in MADT */
>>
>>   /*
>> + * Since we're on ARM, the default interrupt routing model
>> + * clearly has to be GIC.
>> + */
>> +enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_GIC;
>> +
>> +/*
>>    * __acpi_map_table() will be called before page_init(), so early_ioremap()
>>    * or early_memremap() should be called here to for ACPI table mapping.
>>    */
>> @@ -169,6 +175,73 @@ static int __init
>> acpi_parse_madt_gic_cpu_interface_entries(void)
>>       return 0;
>>   }
>>
>> +int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
>> +{
>> +    *irq = irq_find_mapping(NULL, gsi);
>> +
>> +    return 0;
>> +}
>> +EXPORT_SYMBOL_GPL(acpi_gsi_to_irq);
>> +
>> +/*
>> + * success: return IRQ number (>0)
>> + * failure: return =< 0
>> + */
>> +int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
>> +{
>> +    unsigned int irq;
>> +    unsigned int irq_type;
>> +
>> +    /*
>> +     * ACPI have no bindings to indicate SPI or PPI, so we
>> +     * use different mappings from DT in ACPI.
>> +     *
>> +     * For FDT
>> +     * PPI interrupt: in the range [0, 15];
>> +     * SPI interrupt: in the range [0, 987];
>> +     *
>> +     * For ACPI, GSI should be unique so using
>> +     * the hwirq directly for the mapping:
>> +     * PPI interrupt: in the range [16, 31];
>> +     * SPI interrupt: in the range [32, 1019];
>> +     */
>> +
>> +    if (trigger == ACPI_EDGE_SENSITIVE &&
>> +                polarity == ACPI_ACTIVE_LOW)
>> +        irq_type = IRQ_TYPE_EDGE_FALLING;
>> +    else if (trigger == ACPI_EDGE_SENSITIVE &&
>> +                polarity == ACPI_ACTIVE_HIGH)
>> +        irq_type = IRQ_TYPE_EDGE_RISING;
>> +    else if (trigger == ACPI_LEVEL_SENSITIVE &&
>> +                polarity == ACPI_ACTIVE_LOW)
>> +        irq_type = IRQ_TYPE_LEVEL_LOW;
>> +    else if (trigger == ACPI_LEVEL_SENSITIVE &&
>> +                polarity == ACPI_ACTIVE_HIGH)
>> +        irq_type = IRQ_TYPE_LEVEL_HIGH;
>> +    else
>> +        irq_type = IRQ_TYPE_NONE;
>> +
>> +    /*
>> +     * Since only one GIC is supported in ACPI 5.0, we can
>> +     * create mapping refer to the default domain
>> +     */
>> +    irq = irq_create_mapping(NULL, gsi);
>> +    if (!irq)
>> +        return irq;
>> +
>> +    /* Set irq type if specified and different than the current one */
>> +    if (irq_type != IRQ_TYPE_NONE &&
>> +        irq_type != irq_get_trigger_type(irq))
>> +        irq_set_irq_type(irq, irq_type);
>> +    return irq;
>> +}
>> +EXPORT_SYMBOL_GPL(acpi_register_gsi);
>> +
> 
> Not sure if acpi_gsi_to_irq and acpi_{,un}register_gsi belong here.
> These are GIC specific and should belong to GIC driver IMO.

I think we can keep them here as GSI is ACPI specific and they are
not GIC init related.

Thanks
Hanjun
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists