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Message-ID: <20140819151122.GT12769@titan.lakedaemon.net>
Date:	Tue, 19 Aug 2014 11:11:22 -0400
From:	Jason Cooper <jason@...edaemon.net>
To:	Feng Kan <fkan@....com>
Cc:	tglx@...utronix.de, marc.zyngier@....com,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH V4 RESEND 0/2] irqchip: gic: Add support for GIC v2
 bypass disable

Feng,

On Wed, Jul 30, 2014 at 02:56:57PM -0700, Feng Kan wrote:
> This patch series cleans up hex number in the gic driver and then adds
> the code to preserve GIC v2 bypass disable bits in the GIC driver.
> 
> V4 Change: rebase off latest irq tree, merge after gic v3 changes.
> 
> V3 Change: remove incorrect Signoff by 
> 
> V2 Change:
> 	seem my send email was not working correctly, resending this with
>         rebase pull.
> 	- had to pull HaoJian's change out of arm-gic.h to keep consistency.
> 	- replace GIC defines as noted by Marc
> 	- remove GIC_CPU_DISABLE since it no longer used.
> 	- fix gic_cpu_if_down as noted by Marc
> 
> 
> Feng Kan (2):
>   irqchip: gic: replace hex numbers with defines.
>   irqchip: gic: preserve gic V2 bypass bits in cpu ctrl register
> 
>  drivers/irqchip/irq-gic-common.c | 15 +++++++------
>  drivers/irqchip/irq-gic.c        | 46 ++++++++++++++++++++++++++++------------
>  include/linux/irqchip/arm-gic.h  | 16 ++++++++++++++
>  3 files changed, 58 insertions(+), 19 deletions(-)

I've tentatively applied this to irqchip/gic and will merge it into
irqchip/core within the next week or so.

thx,

Jason.
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