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Message-ID: <20140820212843.GB16274@sonymobile.com>
Date: Wed, 20 Aug 2014 14:28:44 -0700
From: Bjorn Andersson <bjorn.andersson@...ymobile.com>
To: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
CC: "Ivan T. Ivanov" <iivanov@...sol.com>,
Linus Walleij <linus.walleij@...aro.org>,
Grant Likely <grant.likely@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
"linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 2/6] pinctrl: Introduce pinctrl driver for Qualcomm
SSBI PMIC's
On Wed 20 Aug 01:06 PDT 2014, Srinivas Kandagatla wrote:
> Hi Bjorn,
>
Hi Srinivas,
Thanks for the testing. I'm reworking the driver to incorporate yours, Linus'
and Ivans feedback.
> Two things which I noticed while trying out this driver to drive a reset
> line.
>
> 1> gpio numbering for pinconf vs gpio are not consistent, they differ by
> an offset of 1.
>
After scratching my head regarding this I now see that there's a off by one in
most of the gpio functions. I've rewroked this to make more sense now.
The gpio numbers has to start at 1, as all documentation is based on that.
[...]
>
> 2> Looking back at v3.4 kernel, for gpio modes, BIT(0) of bank 0 is set
> to enable gpio mode. without this bit driver does not work for output pins.
>
Thanks, I missed that.
Unfortunately, setting that bit results in input not working - the interrupt
bits are never set for gpios that have that bit set. I'm trying to figure out
why this is the case before sending out the new version...
Regards,
Bjorn
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