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Date: Fri, 22 Aug 2014 12:09:41 +0100 From: Marc Zyngier <marc.zyngier@....com> To: "Joe.C" <srv_yingjoe.chen@...iatek.com> CC: Rob Herring <robh+dt@...nel.org>, Pawel Moll <Pawel.Moll@....com>, Mark Rutland <Mark.Rutland@....com>, Ian Campbell <ijc+devicetree@...lion.org.uk>, Kumar Gala <galak@...eaurora.org>, Randy Dunlap <rdunlap@...radead.org>, Russell King <linux@....linux.org.uk>, Thomas Gleixner <tglx@...utronix.de>, Jason Cooper <jason@...edaemon.net>, "Joe.C" <yingjoe.chen@...iatek.com>, Matthias Brugger <matthias.bgg@...il.com>, Olof Johansson <olof@...om.net>, Jonas Jensen <jonas.jensen@...il.com>, Arnd Bergmann <arnd@...db.de>, "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>, "linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>, "srv_heupstream@...iatek.com" <srv_heupstream@...iatek.com>, "yingjoe.chen@...il.com" <yingjoe.chen@...il.com>, "hc.yen@...iatek.com" <hc.yen@...iatek.com>, "yh.chen@...iatek.com" <yh.chen@...iatek.com>, "nathan.chung@...iatek.com" <nathan.chung@...iatek.com>, "eddie.huang@...iatek.com" <eddie.huang@...iatek.com> Subject: Re: [RESEND PATCH v2 1/4] irqchip: gic: Change irq type check when extension is present Hi Joe, On 13/08/14 03:11, Joe.C wrote: > From: "Joe.C" <yingjoe.chen@...iatek.com> > > GIC supports the combination with external extensions. But this > is not reflected in the checks of the interrupt type flag. > This patch allows interrupt types other than the one supported by GIC, > if an architecture extension is present and supports them. > > Signed-off-by: Joe.C <yingjoe.chen@...iatek.com> > --- > drivers/irqchip/irq-gic.c | 27 ++++++++++++++++++--------- > 1 file changed, 18 insertions(+), 9 deletions(-) > > diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c > index 57d165e..66485ab 100644 > --- a/drivers/irqchip/irq-gic.c > +++ b/drivers/irqchip/irq-gic.c > @@ -194,23 +194,32 @@ static int gic_set_type(struct irq_data *d, unsigned int type) > u32 confoff = (gicirq / 16) * 4; > bool enabled = false; > u32 val; > + int ret = 0; > > /* Interrupt configuration for SGIs can't be changed */ > if (gicirq < 16) > return -EINVAL; > > - if (type != IRQ_TYPE_LEVEL_HIGH && type != IRQ_TYPE_EDGE_RISING) > - return -EINVAL; > - > raw_spin_lock(&irq_controller_lock); > > - if (gic_arch_extn.irq_set_type) > - gic_arch_extn.irq_set_type(d, type); > + if (gic_arch_extn.irq_set_type) { > + ret = gic_arch_extn.irq_set_type(d, type); > + if (ret) > + goto out; > + } else if (type != IRQ_TYPE_LEVEL_HIGH && > + type != IRQ_TYPE_EDGE_RISING) { > + ret = -EINVAL; > + goto out; > + } > > val = readl_relaxed(base + GIC_DIST_CONFIG + confoff); > - if (type == IRQ_TYPE_LEVEL_HIGH) > + /* Check for both edge and level here, so we can support GIC irq > + polarity extension in gic_arch_extn.irq_set_type. If arch > + doesn't support polarity extension, the check above will reject > + improper type. */ > + if (type & IRQ_TYPE_LEVEL_MASK) > val &= ~confmask; > - else if (type == IRQ_TYPE_EDGE_RISING) > + else if (type & IRQ_TYPE_EDGE_BOTH) > val |= confmask; > > /* > @@ -226,10 +235,10 @@ static int gic_set_type(struct irq_data *d, unsigned int type) > > if (enabled) > writel_relaxed(enablemask, base + GIC_DIST_ENABLE_SET + enableoff); > - > +out: > raw_spin_unlock(&irq_controller_lock); > > - return 0; > + return ret; > } > > static int gic_retrigger(struct irq_data *d) > You're really abusing the gic_arch_extn feature. I know this is tempting, but this is pushing it a bit too far. This feature exist for one particular reason: if your GIC is in the same power-domain as the CPUs, it will go down as well when you suspend the system, hence being enable to wake the CPU up. You then need a shadow interrupt controller to take over. This is exactly why we call the hook on every GIC-related operation. Here, you're using it to program something that sits between the device and the GIC. This is a separate block, with its own hardware configuration, that modifies the interrupt signal. This should be reflected in the device-tree and the code paths. You can probably model this as a separate irqchip for the few interrupts that require this, or have it configured at boot time (assuming the configuration never changes). Thanks, M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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