lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <53FE34D7.7040004@ti.com>
Date:	Wed, 27 Aug 2014 15:43:19 -0400
From:	Santosh Shilimkar <santosh.shilimkar@...com>
To:	Tony Lindgren <tony@...mide.com>, Nishanth Menon <nm@...com>
CC:	Kevin Hilman <khilman@...prootsystems.com>,
	Tero Kristo <t-kristo@...com>, Paul Walmsley <paul@...an.com>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-omap@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	Keerthy <j-keerthy@...com>,
	BenoƮt Cousson <bcousson@...libre.com>
Subject: Re: [PATCH 07/10] ARM: OMAP5 / DRA7: Enable CPU RET on suspend

On Wednesday 27 August 2014 03:41 PM, Tony Lindgren wrote:
> * Nishanth Menon <nm@...com> [140827 12:05]:
>> On 08/27/2014 01:58 PM, Kevin Hilman wrote:
>>> Nishanth Menon <nm@...com> writes:
>>>
>>>> From: Rajendra Nayak <rnayak@...com>
>>>>
>>>> On OMAP5 / DRA7, prevent a CPU powerdomain OFF and resulting MPU OSWR
>>>> and instead attempt a CPU RET and side effect, MPU RET in suspend.
>>>>
>>>> Signed-off-by: Rajendra Nayak <rnayak@...com>
>>>> [nm@...com: update to do save_state only on DRA7]
>>>> Signed-off-by: Nishanth Menon <nm@...com>
>>>> ---
>>>>  arch/arm/mach-omap2/omap-mpuss-lowpower.c |    4 ++++
>>>>  arch/arm/mach-omap2/omap-wakeupgen.c      |    2 +-
>>>>  arch/arm/mach-omap2/pm44xx.c              |    9 +++++++--
>>>>  3 files changed, 12 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
>>>> index 207fce2..0d640eb 100644
>>>> --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
>>>> +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
>>>> @@ -242,6 +242,10 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
>>>>  		save_state = 1;
>>>>  		break;
>>>>  	case PWRDM_POWER_RET:
>>>> +		if (soc_is_omap54xx() || soc_is_dra7xx()) {
>>>
>>> Aren't we trying to get away from these soc_* checks for anything other
>>> than init code?
>>
>> I would expect that to take place in stages as part of which the next
>> level of cleanup is to move PRM into drivers. Currently our wakeupgen,
>> prm code does have quiet a few needs of dealing with soc_is checks
>> primarily from having to re-architect code in two different directions
>> - we want to move into just one direction eventually - to prm drivers
>> and as less code in mach-omap2 which is already in the works.
> 
> Why don't you just set some flag at init time based on the
> soc_is check and then test that here? That limits the use of
> soc_is to init code only which makes it easier to phase it
> out completely eventually.
> 
Indeed. Infact the version of the code I tried posting last year was
using a flag which was initialised during init. Same can be
done her.

Regards,
Santosh

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ