linux-kernel - Re: [PATCH v5 2/3] ARM: dts: Add main PWM info to rk3288

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Message-ID: <3711416.XmBfSOmzxP@diego>
Date:	Wed, 27 Aug 2014 23:32:49 +0200
From:	Heiko Stübner <heiko@...ech.de>
To:	Doug Anderson <dianders@...omium.org>
Cc:	Thierry Reding <thierry.reding@...il.com>,
	Caesar Wang <caesar.wang@...k-chips.com>,
	Sonny Rao <sonnyrao@...omium.org>, olof@...om.net,
	Eddie Cai <eddie.cai@...k-chips.com>,
	Dmitry Torokhov <dmitry.torokhov@...il.com>,
	robh+dt@...nel.org, pawel.moll@....com, mark.rutland@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
	linux@....linux.org.uk, devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 2/3] ARM: dts: Add main PWM info to rk3288

Am Montag, 25. August 2014, 15:59:26 schrieb Doug Anderson:
> This adds the PWM info (other than the VOP PWM) to the main rk3288
> dtsi file.
> 
> Signed-off-by: Caesar Wang <caesar.wang@...k-chips.com>
> Signed-off-by: Doug Anderson <dianders@...omium.org>
> ---

Applied to my v3.18-next/dts branch.

I've changed the RK_FUNC_3 to its numerical equivalent for now, as the pinctrl 
binding change is probably going through the pinctrl tree at some point.


> Changes in v5:
> - Back to version 3 (no rockchip,grf).
> 
> Changes in v4:
> - Add rockchip,grf to pwm nodes.
> 
> Changes in v3: None
> 
>  arch/arm/boot/dts/rk3288.dtsi | 68
> +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 68
> insertions(+)
> 
> diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
> index 36be7bb..9c9d9c5 100644
> --- a/arch/arm/boot/dts/rk3288.dtsi
> +++ b/arch/arm/boot/dts/rk3288.dtsi
> @@ -261,6 +261,50 @@
>  		status = "disabled";
>  	};
> 
> +	pwm0: pwm@...80000 {
> +		compatible = "rockchip,rk3288-pwm";
> +		reg = <0xff680000 0x10>;
> +		#pwm-cells = <3>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pwm0_pin>;
> +		clocks = <&cru PCLK_PWM>;
> +		clock-names = "pwm";
> +		status = "disabled";
> +	};
> +
> +	pwm1: pwm@...80010 {
> +		compatible = "rockchip,rk3288-pwm";
> +		reg = <0xff680010 0x10>;
> +		#pwm-cells = <3>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pwm1_pin>;
> +		clocks = <&cru PCLK_PWM>;
> +		clock-names = "pwm";
> +		status = "disabled";
> +	};
> +
> +	pwm2: pwm@...80020 {
> +		compatible = "rockchip,rk3288-pwm";
> +		reg = <0xff680020 0x10>;
> +		#pwm-cells = <3>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pwm2_pin>;
> +		clocks = <&cru PCLK_PWM>;
> +		clock-names = "pwm";
> +		status = "disabled";
> +	};
> +
> +	pwm3: pwm@...80030 {
> +		compatible = "rockchip,rk3288-pwm";
> +		reg = <0xff680030 0x10>;
> +		#pwm-cells = <2>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pwm3_pin>;
> +		clocks = <&cru PCLK_PWM>;
> +		clock-names = "pwm";
> +		status = "disabled";
> +	};
> +
>  	pmu: power-management@...30000 {
>  		compatible = "rockchip,rk3288-pmu", "syscon";
>  		reg = <0xff730000 0x100>;
> @@ -611,5 +655,29 @@
>  				rockchip,pins = <5 15 3 &pcfg_pull_none>;
>  			};
>  		};
> +
> +		pwm0 {
> +			pwm0_pin: pwm0-pin {
> +				rockchip,pins = <7 0 RK_FUNC_1 &pcfg_pull_none>;
> +			};
> +		};
> +
> +		pwm1 {
> +			pwm1_pin: pwm1-pin {
> +				rockchip,pins = <7 1 RK_FUNC_1 &pcfg_pull_none>;
> +			};
> +		};
> +
> +		pwm2 {
> +			pwm2_pin: pwm2-pin {
> +				rockchip,pins = <7 22 RK_FUNC_3 &pcfg_pull_none>;
> +			};
> +		};
> +
> +		pwm3 {
> +			pwm3_pin: pwm3-pin {
> +				rockchip,pins = <7 23 RK_FUNC_3 &pcfg_pull_none>;
> +			};
> +		};
>  	};
>  };

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