| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <20140827213559.GB11489@us.ibm.com>
Date: Wed, 27 Aug 2014 14:35:59 -0700
From: Sukadev Bhattiprolu <sukadev@...ux.vnet.ibm.com>
To: Anshuman Khandual <khandual@...ux.vnet.ibm.com>
Cc: linux-kernel@...r.kernel.org, linuxppc-dev@...abs.org,
peterz@...radead.org, akpm@...ux-foundation.org,
tglx@...utronix.de, mikey@...ling.org, james.hogan@...tec.com,
avagin@...nvz.org, Paul.Clothier@...tec.com, palves@...hat.com,
oleg@...hat.com, dhowells@...hat.com, davej@...hat.com,
davem@...emloft.net
Subject: Re: [PATCH V3 3/3] powerpc, ptrace: Enable support for miscellaneous
registers
Anshuman Khandual [khandual@...ux.vnet.ibm.com] wrote:
| This patch enables get and set of miscellaneous registers through ptrace
| PTRACE_GETREGSET/PTRACE_SETREGSET interface by implementing new powerpc
| specific register set REGSET_MISC support corresponding to the new ELF
| core note NT_PPC_MISC added previously in this regard.
|
| Signed-off-by: Anshuman Khandual <khandual@...ux.vnet.ibm.com>
| ---
| arch/powerpc/kernel/ptrace.c | 81 ++++++++++++++++++++++++++++++++++++++++++++
| 1 file changed, 81 insertions(+)
|
| diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
| index 17642ef..63b883a 100644
| --- a/arch/powerpc/kernel/ptrace.c
| +++ b/arch/powerpc/kernel/ptrace.c
| @@ -1149,6 +1149,76 @@ static int tm_cvmx_set(struct task_struct *target, const struct user_regset *reg
| #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
|
| /*
| + * Miscellaneous Registers
| + *
| + * struct {
| + * unsigned long dscr;
| + * unsigned long ppr;
| + * unsigned long tar;
| + * };
| + */
| +static int misc_get(struct task_struct *target, const struct user_regset *regset,
| + unsigned int pos, unsigned int count,
| + void *kbuf, void __user *ubuf)
| +{
| + int ret;
| +
| + /* DSCR register */
| + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
| + &target->thread.dscr, 0,
| + sizeof(unsigned long));
| +
| + BUILD_BUG_ON(offsetof(struct thread_struct, dscr) + sizeof(unsigned long) +
| + sizeof(unsigned long) != offsetof(struct thread_struct, ppr));
I see these in arch/powerpc/include/asm/processor.h
#ifdef CONFIG_PPC64
unsigned long dscr;
int dscr_inherit;
unsigned long ppr; /* used to save/restore SMT priority */
#endif
where there is an 'int' between ppr and dscr. So, should one of
the above sizeof(unsigned long) be changed to sizeof(int) ?
Also, since we use offsetof(struct thread_struct, field) heavily, a
macro local to the file, may simplify the code.
#define TSO(f) (offsetof(struct thread_struct, f))
| +
| + /* PPR register */
| + if (!ret)
| + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
| + &target->thread.ppr, sizeof(unsigned long),
| + 2 * sizeof(unsigned long));
| +
| + BUILD_BUG_ON(offsetof(struct thread_struct, ppr) + sizeof(unsigned long)
| + != offsetof(struct thread_struct, tar));
| + /* TAR register */
| + if (!ret)
| + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
| + &target->thread.tar, 2 * sizeof(unsigned long),
| + 3 * sizeof(unsigned long));
| + return ret;
| +}
| +
| +static int misc_set(struct task_struct *target, const struct user_regset *regset,
| + unsigned int pos, unsigned int count,
| + const void *kbuf, const void __user *ubuf)
| +{
| + int ret;
| +
| + /* DSCR register */
| + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
| + &target->thread.dscr, 0,
| + sizeof(unsigned long));
| +
| + BUILD_BUG_ON(offsetof(struct thread_struct, dscr) + sizeof(unsigned long) +
| + sizeof(unsigned long) != offsetof(struct thread_struct, ppr));
| +
| + /* PPR register */
| + if (!ret)
| + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
| + &target->thread.ppr, sizeof(unsigned long),
| + 2 * sizeof(unsigned long));
| +
| + BUILD_BUG_ON(offsetof(struct thread_struct, ppr) + sizeof(unsigned long)
| + != offsetof(struct thread_struct, tar));
| +
| + /* TAR register */
| + if (!ret)
| + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
| + &target->thread.tar, 2 * sizeof(unsigned long),
| + 3 * sizeof(unsigned long));
| + return ret;
| +}
| +
| +/*
| * These are our native regset flavors.
| */
| enum powerpc_regset {
| @@ -1169,6 +1239,7 @@ enum powerpc_regset {
| REGSET_TM_CFPR, /* TM checkpointed FPR */
| REGSET_TM_CVMX, /* TM checkpointed VMX */
| #endif
| + REGSET_MISC /* Miscellaneous */
| };
|
| static const struct user_regset native_regsets[] = {
| @@ -1225,6 +1296,11 @@ static const struct user_regset native_regsets[] = {
| .active = tm_cvmx_active, .get = tm_cvmx_get, .set = tm_cvmx_set
| },
| #endif
| + [REGSET_MISC] = {
| + .core_note_type = NT_PPC_MISC, .n = 3,
| + .size = sizeof(u64), .align = sizeof(u64),
| + .get = misc_get, .set = misc_set
| + },
| };
|
| static const struct user_regset_view user_ppc_native_view = {
| @@ -1566,6 +1642,11 @@ static const struct user_regset compat_regsets[] = {
| .active = tm_cvmx_active, .get = tm_cvmx_get, .set = tm_cvmx_set
| },
| #endif
| + [REGSET_MISC] = {
| + .core_note_type = NT_PPC_MISC, .n = 3,
| + .size = sizeof(u64), .align = sizeof(u64),
| + .get = misc_get, .set = misc_set
| + },
Since the .n = 3 is used more than once, how about a macro for the
number of misc registers ?
| };
|
| static const struct user_regset_view user_ppc_compat_view = {
| --
| 1.7.11.7
|
| _______________________________________________
| Linuxppc-dev mailing list
| Linuxppc-dev@...ts.ozlabs.org
| https://lists.ozlabs.org/listinfo/linuxppc-dev
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists