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Message-ID: <CAL1qeaEEo6-LZz3Kex7oPUfz=Z56nvKoDnqu051rGhhi3ZFTDQ@mail.gmail.com>
Date:	Sun, 31 Aug 2014 11:54:04 -0700
From:	Andrew Bresticker <abrestic@...omium.org>
To:	Arnd Bergmann <arnd@...db.de>
Cc:	Ralf Baechle <ralf@...ux-mips.org>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Jeffrey Deans <jeffrey.deans@...tec.com>,
	Markos Chandras <markos.chandras@...tec.com>,
	Paul Burton <paul.burton@...tec.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Jason Cooper <jason@...edaemon.net>,
	Linux-MIPS <linux-mips@...ux-mips.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 04/12] MIPS: GIC: Move MIPS_GIC_IRQ_BASE into platform irq.h

On Sat, Aug 30, 2014 at 12:57 AM, Arnd Bergmann <arnd@...db.de> wrote:
> On Friday 29 August 2014 15:14:31 Andrew Bresticker wrote:
>> Define a generic MIPS_GIC_IRQ_BASE which is suitable for Malta and
>> the upcoming Danube board in <mach-generic/irq.h>.  Since Sead-3 is
>> different and uses a MIPS_GIC_IRQ_BASE equal to the CPU IRQ base (0),
>> define its MIPS_GIC_IRQ_BASE in <mach-sead3/irq.h>.
>>
>> Signed-off-by: Andrew Bresticker <abrestic@...omium.org>
>>
>
> Why do you actually have to hardwire an IRQ base? Can't you move
> to the linear irqdomain code for DT based MIPS systems yet?

Neither Malta nor SEAD-3 use device-tree for interrupts yet, so they
still require a hard-coded IRQ base.  For boards using device-tree, I
stuck with a legacy IRQ domain as it allows most of the existing GIC
irqchip code to be reused.
--
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