lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAL1qeaHryi7noBMiHxJPybByuvVts23reuiiQbV9mCQj+Ngqjw@mail.gmail.com>
Date:	Mon, 1 Sep 2014 17:08:24 -0700
From:	Andrew Bresticker <abrestic@...omium.org>
To:	Arnd Bergmann <arnd@...db.de>
Cc:	Ralf Baechle <ralf@...ux-mips.org>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Jeffrey Deans <jeffrey.deans@...tec.com>,
	Markos Chandras <markos.chandras@...tec.com>,
	Paul Burton <paul.burton@...tec.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Jason Cooper <jason@...edaemon.net>,
	Linux-MIPS <linux-mips@...ux-mips.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 04/12] MIPS: GIC: Move MIPS_GIC_IRQ_BASE into platform irq.h

On Mon, Sep 1, 2014 at 1:34 AM, Arnd Bergmann <arnd@...db.de> wrote:
> On Sunday 31 August 2014 11:54:04 Andrew Bresticker wrote:
>> On Sat, Aug 30, 2014 at 12:57 AM, Arnd Bergmann <arnd@...db.de> wrote:
>> > On Friday 29 August 2014 15:14:31 Andrew Bresticker wrote:
>> >> Define a generic MIPS_GIC_IRQ_BASE which is suitable for Malta and
>> >> the upcoming Danube board in <mach-generic/irq.h>.  Since Sead-3 is
>> >> different and uses a MIPS_GIC_IRQ_BASE equal to the CPU IRQ base (0),
>> >> define its MIPS_GIC_IRQ_BASE in <mach-sead3/irq.h>.
>> >>
>> >> Signed-off-by: Andrew Bresticker <abrestic@...omium.org>
>> >>
>> >
>> > Why do you actually have to hardwire an IRQ base? Can't you move
>> > to the linear irqdomain code for DT based MIPS systems yet?
>>
>> Neither Malta nor SEAD-3 use device-tree for interrupts yet, so they
>> still require a hard-coded IRQ base.  For boards using device-tree, I
>> stuck with a legacy IRQ domain as it allows most of the existing GIC
>> irqchip code to be reused.
>
> I see. Note that we now have irq_domain_add_simple(), which should
> do the right think in either case: use a legacy domain when a
> nonzero base is provided for the old boards, but use the simple
> domain when probed from DT without an irq base.
>
> This makes the latter case more memory efficient (it avoids
> allocating the irq descriptors for every possibly but unused
> IRQ number) and helps ensure that you don't accidentally rely
> on hardcoded IRQ numbers for the DT based machines, which would
> be considered a bug.

Ah, ok.  It looks like add_simple() is what I want then.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ