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Message-Id: <1409670830-14544-1-git-send-email-pbonzini@redhat.com>
Date: Tue, 2 Sep 2014 17:13:46 +0200
From: Paolo Bonzini <pbonzini@...hat.com>
To: linux-kernel@...r.kernel.org, kvm@...r.kernel.org
Cc: jroedel@...e.de, agraf@...e.de, valentine.sinitsyn@...il.com,
jan.kiszka@...mens.com, gleb@...udius-systems.com,
avi@...udius-systems.com
Subject: [PATCH 0/4] KVM: nested x86: nested page faults fixes
Patch 1 implements AMD semantics for non-leaf PDPEs and PML4Es, which
are a bit different from Intel. The SVM test relies on this, so fix it.
Patch 2 lets nested SVM implement nested page fault correctly. We were
not setting bits 32/33.
Patches 3 and 4 fix the interaction between emulator and nested EPT/NPT,
which was reported by Valentine.
Reviews are very welcome, I'm walking on thin ice here...
Paolo
Paolo Bonzini (4):
KVM: x86: reserve bit 8 of non-leaf PDPEs and PML4Es in 64-bit mode on AMD
KVM: nSVM: propagate the NPF EXITINFO to the guest
KVM: x86: inject nested page faults on emulated instructions
KVM: x86: propagate exception from permission checks on the nested page fault
arch/x86/include/asm/kvm_host.h | 9 ++++++---
arch/x86/kvm/cpuid.h | 8 ++++++++
arch/x86/kvm/mmu.c | 15 ++++++++++++---
arch/x86/kvm/paging_tmpl.h | 13 ++++++++++---
arch/x86/kvm/svm.c | 26 ++++++++++++++++++++++----
arch/x86/kvm/x86.c | 27 +++++++++++++++++++--------
6 files changed, 77 insertions(+), 21 deletions(-)
--
1.8.3.1
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