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Message-ID: <alpine.DEB.2.10.1409031413230.3333@nanos>
Date:	Wed, 3 Sep 2014 14:18:51 +0200 (CEST)
From:	Thomas Gleixner <tglx@...utronix.de>
To:	Florian Fainelli <f.fainelli@...il.com>
cc:	linux-kernel@...r.kernel.org, jason@...edaemon.net,
	computersforpeace@...il.com
Subject: Re: [PATCH 1/2] irqchip: add Broadcom BCM7120-style Level 2 interrupt
 controller

On Thu, 28 Aug 2014, Florian Fainelli wrote:
> +static void bcm7120_l2_intc_irq_handle(unsigned int irq, struct irq_desc *desc)
> +{
> +	struct bcm7120_l2_intc_data *b = irq_desc_get_handler_data(desc);
> +	struct irq_chip *chip = irq_desc_get_chip(desc);
> +	struct irq_chip_generic *gc = irq_get_domain_generic_chip(b->domain, 0);
> +	u32 status;
> +
> +	chained_irq_enter(chip, desc);
> +
> +	irq_gc_lock(gc);
> +	status = __raw_readl(b->base + IRQSTAT);
> +	irq_gc_unlock(gc);

Why do you need locking around the status read out?

> +	for (irq = 0; irq < num_parent_irqs; irq++) {
> +		ret = bcm7120_l2_intc_init_one(dn, data, irq, map_mask);
> +		if (ret)
> +			continue;

What's the exact purpose of this "if (ret)" construct?

Thanks,

	tglx
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