linux-kernel - Re: [PATCH v2 3/9] ARM: zynq: DT: Add DDRC node

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Date:	Wed, 03 Sep 2014 15:49:47 +0200
From:	Daniel Lezcano <daniel.lezcano@...aro.org>
To:	Soren Brinkmann <soren.brinkmann@...inx.com>,
	Michal Simek <michal.simek@...inx.com>
CC:	Russell King <linux@....linux.org.uk>,
	"Rafael J. Wysocki" <rjw@...ysocki.net>,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org, linux-pm@...r.kernel.org,
	Rob Herring <robh+dt@...nel.org>,
	Mark Rutland <mark.rutland@....com>,
	Pawel Moll <pawel.moll@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>
Subject: Re: [PATCH v2 3/9] ARM: zynq: DT: Add DDRC node

On 09/02/2014 11:19 PM, Soren Brinkmann wrote:
> Add the DDR controller to the Zynq devicetree.
>
> Signed-off-by: Soren Brinkmann <soren.brinkmann@...inx.com>

Acked-by: Daniel Lezcano <daniel.lezcano@...aro.org>

> ---
>   arch/arm/boot/dts/zynq-7000.dtsi | 5 +++++
>   1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
> index 6cc83d4c6c76..587cadcf7001 100644
> --- a/arch/arm/boot/dts/zynq-7000.dtsi
> +++ b/arch/arm/boot/dts/zynq-7000.dtsi
> @@ -146,6 +146,11 @@
>   			cache-level = <2>;
>   		};
>
> +		memory-controller@...06000 {
> +			compatible = "xlnx,zynq-ddrc-a05";
> +			reg = <0xf8006000 0x1000>;
> +		} ;
> +
>   		uart0: serial@...00000 {
>   			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
>   			status = "disabled";
>


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