linux-kernel - Re: [PATCH V2 0/4] clk: mvebu: Improve clock drift

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Date:	Wed, 03 Sep 2014 15:40:56 +0100
From:	Leigh Brown <leigh@...inno.co.uk>
To:	Gregory CLEMENT <gregory.clement@...e-electrons.com>
Cc:	Mike Turquette <mturquette@...aro.org>,
	linux-kernel@...r.kernel.org, Jason Cooper <jason@...edaemon.net>,
	Andrew Lunn <andrew@...n.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
	Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
	Ezequiel Garcia <ezequiel.garcia@...e-electrons.com>,
	linux-arm-kernel@...ts.infradead.org,
	Lior Amsalem <alior@...vell.com>,
	Tawfik Bayouk <tawfik@...vell.com>,
	Nadav Haklai <nadavh@...vell.com>,
	Raphael Rigo <ml-arm@...call.eu>,
	Arnaud Ebalard <arno@...isbad.org>,
	Simon Boulay <simon.boulay@...ec.com>
Subject: Re: [PATCH V2 0/4] clk: mvebu: Improve clock drift

On 2014-09-02 09:15, Gregory CLEMENT wrote:
> Few users reported a timer drift on the Armada 370 based board such as
> the mirabox or the Netgear ReadyNAS 102. This is the second series
> with few improvements after the review of the 1st version.
> 
> The reason is that when the SSCG (Spread Spectrum Clock Generator) is
> enabled, it shifts the frequency of the clock. The percentage is no
> more than 1% but when the clock is used for a timer it leads to a
> clock drift.
> 
> This series allows to correct the affected clock when the SSCG is
> enabled. This drift can happen on all the mvebu SoC on the cpu clock
> block (ie cpu, ddr and l2 cache). Currently the only notable effect is
> for the Armada 370 because this SoC use the l2cache clock as source
> for the timer. That's why even if the series allow any of the mvebu
> SoC to benefit to this correction, Armada 370 is the only user of it.
> 
> The first 2 patches should go through the clk subsystem, whereas the
> third one should go to the arm-soc through the mvebu tree.
> 
> The last one is just to fix a typo I found while I was reading the clk
> code.

This is working superbly for me on my Mirabox, and ntpd is now 
completely stable.

Tested-by: Leigh Brown <leigh@...inno.co.uk>

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