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Message-ID: <54083A94.2040105@linaro.org>
Date: Thu, 04 Sep 2014 12:10:28 +0200
From: Tomasz Nowicki <tomasz.nowicki@...aro.org>
To: Arnd Bergmann <arnd@...db.de>, linux-arm-kernel@...ts.infradead.org
CC: Hanjun Guo <hanjun.guo@...aro.org>,
Catalin Marinas <catalin.marinas@....com>,
"Rafael J. Wysocki" <rjw@...ysocki.net>,
Mark Rutland <mark.rutland@....com>,
Olof Johansson <olof@...om.net>,
Grant Likely <grant.likely@...aro.org>,
linaro-acpi@...ts.linaro.org, Liviu Dudau <Liviu.Dudau@....com>,
Lv Zheng <lv.zheng@...el.com>, Rob Herring <robh@...nel.org>,
Lorenzo Pieralisi <Lorenzo.Pieralisi@....com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Robert Moore <robert.moore@...el.com>,
linux-acpi@...r.kernel.org, Charles.Garcia-Tobin@....com,
Robert Richter <rric@...nel.org>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <marc.zyngier@....com>,
Will Deacon <will.deacon@....com>,
Mark Brown <broonie@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Graeme Gregory <graeme.gregory@...aro.org>,
Randy Dunlap <rdunlap@...radead.org>,
linux-kernel@...r.kernel.org, Sudeep Holla <Sudeep.Holla@....com>
Subject: Re: [PATCH v3 13/17] ARM64 / ACPI: Add GICv2 specific ACPI boot support
On 03.09.2014 20:42, Arnd Bergmann wrote:
> On Monday 01 September 2014 22:57:51 Hanjun Guo wrote:
>> + /* Collect CPU base addresses */
>> + count = acpi_parse_entries(sizeof(struct acpi_table_madt),
>> + gic_acpi_parse_madt_cpu, table,
>> + ACPI_MADT_TYPE_GENERIC_INTERRUPT,
>> + ACPI_MAX_GIC_CPU_INTERFACE_ENTRIES);
>> + if (count < 0) {
>> + pr_err("Error during GICC entries parsing\n");
>> + return -EFAULT;
>> + } else if (!count) {
>> + /* No GICC entries provided, use address from MADT header */
>> + struct acpi_table_madt *madt = (struct acpi_table_madt *)table;
>> +
>> + if (!madt->address)
>> + return -EFAULT;
>> +
>> + cpu_phy_base = (u64)madt->address;
>> + }
>
> After I read through ACPI-5.1 section 5.2.12.14, I wonder if this is the
> best way to treat a missing ACPI_MADT_TYPE_GENERIC_INTERRUPT table.
>
> Do we expect to see those in practice? It seems like using the x86 local
> APIC address as a fallback for the GIC address is not something we
> should do unless we absolutely have to support a system that doesn't
> have the GIC table.
No, we do not expect and hopefully there will be no such :)
But, we are trying to be as much as possible inline with 5.1 spec,
5.2.12.14 says:
[...]
If provided here (CPU physical base address), the "Local Interrupt
Controller Address" field in the MADT must be ignored by the OSPM.
[...]
Regards,
Tomasz
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