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Message-ID: <54084171.6050305@linaro.org>
Date: Thu, 04 Sep 2014 12:39:45 +0200
From: Tomasz Nowicki <tomasz.nowicki@...aro.org>
To: Arnd Bergmann <arnd@...db.de>, linux-arm-kernel@...ts.infradead.org
CC: Mark Rutland <mark.rutland@....com>, linaro-acpi@...ts.linaro.org,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
Lv Zheng <lv.zheng@...el.com>, Rob Herring <robh@...nel.org>,
Lorenzo Pieralisi <Lorenzo.Pieralisi@....com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Robert Moore <robert.moore@...el.com>,
linux-acpi@...r.kernel.org, Grant Likely <grant.likely@...aro.org>,
Charles.Garcia-Tobin@....com, Robert Richter <rric@...nel.org>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <marc.zyngier@....com>,
Liviu Dudau <Liviu.Dudau@....com>,
Mark Brown <broonie@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Graeme Gregory <graeme.gregory@...aro.org>,
Randy Dunlap <rdunlap@...radead.org>,
"Rafael J. Wysocki" <rjw@...ysocki.net>,
linux-kernel@...r.kernel.org, Hanjun Guo <hanjun.guo@...aro.org>,
Sudeep Holla <Sudeep.Holla@....com>,
Olof Johansson <olof@...om.net>
Subject: Re: [PATCH v3 13/17] ARM64 / ACPI: Add GICv2 specific ACPI boot support
On 04.09.2014 12:14, Arnd Bergmann wrote:
> On Thursday 04 September 2014 12:10:28 Tomasz Nowicki wrote:
>> On 03.09.2014 20:42, Arnd Bergmann wrote:
>>> On Monday 01 September 2014 22:57:51 Hanjun Guo wrote:
>>>> + /* Collect CPU base addresses */
>>>> + count = acpi_parse_entries(sizeof(struct acpi_table_madt),
>>>> + gic_acpi_parse_madt_cpu, table,
>>>> + ACPI_MADT_TYPE_GENERIC_INTERRUPT,
>>>> + ACPI_MAX_GIC_CPU_INTERFACE_ENTRIES);
>>>> + if (count < 0) {
>>>> + pr_err("Error during GICC entries parsing\n");
>>>> + return -EFAULT;
>>>> + } else if (!count) {
>>>> + /* No GICC entries provided, use address from MADT header */
>>>> + struct acpi_table_madt *madt = (struct acpi_table_madt *)table;
>>>> +
>>>> + if (!madt->address)
>>>> + return -EFAULT;
>>>> +
>>>> + cpu_phy_base = (u64)madt->address;
>>>> + }
>>>
>>> After I read through ACPI-5.1 section 5.2.12.14, I wonder if this is the
>>> best way to treat a missing ACPI_MADT_TYPE_GENERIC_INTERRUPT table.
>>>
>>> Do we expect to see those in practice? It seems like using the x86 local
>>> APIC address as a fallback for the GIC address is not something we
>>> should do unless we absolutely have to support a system that doesn't
>>> have the GIC table.
>>
>> No, we do not expect and hopefully there will be no such
>>
>> But, we are trying to be as much as possible inline with 5.1 spec,
>> 5.2.12.14 says:
>> [...]
>> If provided here (CPU physical base address), the "Local Interrupt
>> Controller Address" field in the MADT must be ignored by the OSPM.
>> [...]
>>
>
> Yes, that's what I saw. So ignoring it all the time is fine, right?
> Presumably the madt->address field is only referenced here because
> some pre-5.1 implementations used to do that.
So this is very vague statement. On the one hand it would make sense to
take madt->address if we have no GICC entries. On the other hand we do
not support non-banked GIC cpu registers. So all of then need to have
the same cpu_base_address. What if one has null address? Should the rest
take madt->address? I think you are right, I will remove madt->address
fallback and simplify the code.
Thanks,
Tomasz
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