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Message-ID: <1409930574.28990.192.camel@misato.fc.hp.com>
Date: Fri, 05 Sep 2014 09:22:54 -0600
From: Toshi Kani <toshi.kani@...com>
To: "H. Peter Anvin" <hpa@...or.com>
Cc: Andy Lutomirski <luto@...capital.net>,
Henrique de Moraes Holschuh <hmh@....eng.br>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, akpm@...uxfoundation.org,
Arnd Bergmann <arnd@...db.de>,
"linux-mm@...ck.org" <linux-mm@...ck.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Juergen Gross <jgross@...e.com>,
Stefan Bader <stefan.bader@...onical.com>,
Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>
Subject: Re: [PATCH 1/5] x86, mm, pat: Set WT to PA4 slot of PAT MSR
On Fri, 2014-09-05 at 08:07 -0700, H. Peter Anvin wrote:
> On 09/05/2014 07:00 AM, Toshi Kani wrote:
> >
> > That's a fine idea, but as Ingo also suggested, I am going to disable
> > this feature on all Pentium 4 models. That should give us a safety
> > margin. Using slot 4 has a benefit that it keeps the PAT setup
> > consistent with Xen.
> >
>
> Slot 4 is also the maximally problematic one, because it is the one that
> might be incorrectly invoked for the page tables themselves.
Good point. I wonder if Xen folks feel strongly about keeping the PAT
setup consistent with the kernel. If not, we may choose to use slot 6
(or 7).
Thanks,
-Toshi
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