linux-kernel - Re: [PATCH 2/2] Documentation: bcm7120-l2: Add Broadcom BCM7120-style L2 binding

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Message-ID: <540A27DC.4010206@gmail.com>
Date:	Fri, 05 Sep 2014 14:15:08 -0700
From:	Florian Fainelli <f.fainelli@...il.com>
To:	Thomas Gleixner <tglx@...utronix.de>
CC:	Mark Rutland <mark.rutland@....com>,
	LKML <linux-kernel@...r.kernel.org>,
	"jason@...edaemon.net" <jason@...edaemon.net>,
	"computersforpeace@...il.com" <computersforpeace@...il.com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH 2/2] Documentation: bcm7120-l2: Add Broadcom BCM7120-style
 L2 binding

On 09/05/2014 01:44 PM, Thomas Gleixner wrote:
> On Fri, 5 Sep 2014, Florian Fainelli wrote:
>> On 09/05/2014 12:21 PM, Thomas Gleixner wrote:
>>> So if I understand correctly what you have is:
>>>
>>>                           /- GIC------------->   
>>>  Device-irq ---- [routing]
>>>                           \- BC irq chip ---->
>>>
>>> and you implement it as
>>>
>>>  Device-irq ---- [BC irq chip] ---- [GIC] --->
>>>                             |
>>>                             ----------------->
>>>
>>> And the fwd mask is to tell the BC chip to use the GIC and which irq
>>> of the GIC, so it can fiddle with the GIC under the hood, right?
>>
>> The forward mask really is to tell the BCM7120 l2 interrupt controller:
>> bypass me, and output the UART interrupts directly at the GIC level, so
>> I think this does match your understanding.
>>
>> Not setting the forward mask means you would get the UART interrupts at
>> the BCM7120 l2 interrupt controller level, and have to handle them here.
>>
>> Hope this helps clarify what this funky piece of hardware does.
> 
> Sigh, this stacked interrupt chip nonsense is becoming a plague.

This is a HW design that we inherited, but fortunately we might be able
to fix that in the future.

> 
> So if you set that bit then the UART driver only sees the GIC as its
> interrupt controller and not the L2 thingy. So, the L2 chip only
> enables its interrupt unconditionally for that line and the
> enable/disable happens at the GIC level.

Exactly, this is completely transparent for the UART and the GIC.

> 
> If that's the case, that's fine with me. It's not pretty, but at least
> it does not involve L2 fiddling indirectly with the GIC.

Absolutely, we do not have to do the arch_gic_extn thingy.

Thanks for your feedback!
--
Florian
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